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dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=oss.nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DBBPR04MB7515.eurprd04.prod.outlook.com (2603:10a6:10:202::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4173.24; Fri, 28 May 2021 11:01:18 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::45b9:c993:87ec:9a64%8]) with mapi id 15.20.4173.024; Fri, 28 May 2021 11:01:18 +0000 From: "Peng Fan (OSS)" To: sboyd@kernel.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, Peng Fan Subject: [PATCH 3/3] clk: gate: support regmap Date: Fri, 28 May 2021 19:34:03 +0800 Message-Id: <20210528113403.5374-4-peng.fan@oss.nxp.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20210528113403.5374-1-peng.fan@oss.nxp.com> References: <20210528113403.5374-1-peng.fan@oss.nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR06CA0158.apcprd06.prod.outlook.com (2603:1096:1:1e::12) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SG2PR06CA0158.apcprd06.prod.outlook.com (2603:1096:1:1e::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4173.20 via Frontend Transport; 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So let's use regmap here. Signed-off-by: Peng Fan --- drivers/clk/clk-gate.c | 26 +++++++++++++++++++++++--- include/linux/clk-provider.h | 3 +++ 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 070dc47e95a1..1acaa2f5a969 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -25,18 +26,37 @@ static inline u32 clk_gate_readl(struct clk_gate *gate) { - if (gate->flags & CLK_GATE_BIG_ENDIAN) + int ret; + u32 val; + + if (gate->flags & CLK_GATE_BIG_ENDIAN) { return ioread32be(gate->reg); + } else if (gate->flags & CLK_GATE_REGMAP) { + ret = regmap_read(gate->regmap, gate->reg_off, &val); + if (ret < 0) { + pr_warn("%s: failed %x, %d\n", __func__, gate->reg_off, ret); + return ret; + } else { + return val; + } + } return readl(gate->reg); } static inline void clk_gate_writel(struct clk_gate *gate, u32 val) { - if (gate->flags & CLK_GATE_BIG_ENDIAN) + int ret; + + if (gate->flags & CLK_GATE_BIG_ENDIAN) { iowrite32be(val, gate->reg); - else + } else if (gate->flags & CLK_GATE_REGMAP) { + ret = regmap_write(gate->regmap, gate->reg_off, val); + if (ret < 0) + pr_warn("%s: %x: %d\n", __func__, gate->reg_off, ret); + } else { writel(val, gate->reg); + } } /* diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 3902f883cdaf..0a4c01a023cc 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -474,6 +474,8 @@ struct clk_gate { u8 bit_idx; u8 flags; spinlock_t *lock; + struct regmap *regmap; + u32 reg_off; }; #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) @@ -481,6 +483,7 @@ struct clk_gate { #define CLK_GATE_SET_TO_DISABLE BIT(0) #define CLK_GATE_HIWORD_MASK BIT(1) #define CLK_GATE_BIG_ENDIAN BIT(2) +#define CLK_GATE_REGMAP BIT(3) extern const struct clk_ops clk_gate_ops; struct clk_hw *__clk_hw_register_gate(struct device *dev,