From patchwork Wed Jun 2 15:44:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 12295229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DD67C4708F for ; Wed, 2 Jun 2021 16:00:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3AF776157E for ; Wed, 2 Jun 2021 16:00:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3AF776157E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y/T+xyl/FUV0G6hixM96tSInVSadd4x9ptzc894VdBw=; b=ZbOg+pgRwlGBF6 /qCC7MTauTwlssxzMul2N0EJkO0P5d6KaHY2YIUWWbidGQdm1/+3+PbHwqtAEpJPeDa3301UTBBOV El4CIFX8QDERN++EMATT9qaJfLq34c25G89tmQcS7lopzB38ufUCF7ct3YGT0hWfHFoeYH+sLgdkM j9+G6sbbFe63cEvW1M4BDwf4bUCCROA9lwoP5L3rJmJesO0eqtWAuqVWSkuSpwdPY8UiPkvh7AQzC pshAxlhZImQUkf5mjO7WAjYE8/FaCvHzb5ncP8O+jWeyVsjF//axcs8t3EnHuGAprTUzuZh33dzZ+ pKLi6/nQ8HFRgpD3Ggmg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1loTGE-004xqa-FF; Wed, 02 Jun 2021 15:58:26 +0000 Received: from mail-ej1-f53.google.com ([209.85.218.53]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1loTE3-004wnx-Pl for linux-arm-kernel@lists.infradead.org; Wed, 02 Jun 2021 15:56:14 +0000 Received: by mail-ej1-f53.google.com with SMTP id l1so4594817ejb.6 for ; Wed, 02 Jun 2021 08:56:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T0y2iCeYYHmrE1fv4Hgj0FTcnFeMz1q5JiDftJFl4po=; b=UU+ar2uiuIssxizF/XowP5GaXfYLplYpn1Nerb/7N0zWP6tskNLr9vCRUsE3fwARUH KokNG9WNbX2xrgEdrnbZnTnn3Toqdt1Qxq/f391f20+UIKbP13jlmzNdO31ElLUPY2Dh hU3W+Drm7oI+RXtS+S8oCII7VQkfw7M4NvmNI0+2nahkcVlhWUqQV3z3BIKVLOCh4DoB bPIzZWQd/7A5ATsgUulJsY1I0BKRz5H0Zq2FYTa29L/SatFBvgoajrAU/TNLoyCdNX9D 9bUKbLDBcn27eMuJQCuJvuzUvgHQLS1VrbrbNj3xHESrrYSx1hKBJdaCqx+fqIiVdhJg zPZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T0y2iCeYYHmrE1fv4Hgj0FTcnFeMz1q5JiDftJFl4po=; b=QzQb8vSVIf3vkRPtNQ9rGbL5NUlXmD5lH89DHwCKKOPgqLfzakekuoWlEYyUBBLaWs sL/i7lvDTy2oW3DwMIQEAtj/J+yluUv7XnaWMuQnWSVO6uFW4YCtJdcX9C5VlXiq3VaX ffAQC9ehgDcpbTgFgxD535DHYDNuhMfWxAtEbc5qgmV6wu+ApcOcRz0nM2aHfxQS3taC TETj5uiP86sUTiD9wEMJ7HSk4rRgDP/NMHvNTeHLDsPXUER3c1SIRBGUsg5iDGwjHBVr AZeB6AIcxedmG7+m2lsSvD+XgjdOKFF9u5XDg8dTYPba/bqZvNXxetgC1yukxxpCd8Oq 41YQ== X-Gm-Message-State: AOAM533bxIb7Cx8Oa/o6e1e//aR2BjRQJVugBFKxxc3Q8u+36swtARLC jmLmObWNsXo5QapRZunRCA5k7Q== X-Google-Smtp-Source: ABdhPJyGy0NBOJzSJQLD2BsBLdPZKOs9cC7yrRFD8NAp8rayeCfk0SMetwDCXBWEmUHXL74G7L/GJw== X-Received: by 2002:a17:906:3b92:: with SMTP id u18mr34902477ejf.450.1622649310639; Wed, 02 Jun 2021 08:55:10 -0700 (PDT) Received: from localhost.localdomain (adsl-84-226-111-173.adslplus.ch. [84.226.111.173]) by smtp.gmail.com with ESMTPSA id d24sm174249edr.95.2021.06.02.08.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Jun 2021 08:55:10 -0700 (PDT) From: Jean-Philippe Brucker To: rjw@rjwysocki.net, lenb@kernel.org, joro@8bytes.org, mst@redhat.com Cc: will@kernel.org, catalin.marinas@arm.com, baolu.lu@linux.intel.com, dwmw2@infradead.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, eric.auger@redhat.com, sebastien.boeuf@intel.com, robin.murphy@arm.com, kevin.tian@intel.com, lorenzo.pieralisi@arm.com, guohanjun@huawei.com, sudeep.holla@arm.com, jean-philippe@linaro.org Subject: [PATCH v3 4/6] iommu/dma: Pass address limit rather than size to iommu_setup_dma_ops() Date: Wed, 2 Jun 2021 17:44:44 +0200 Message-Id: <20210602154444.1077006-5-jean-philippe@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210602154444.1077006-1-jean-philippe@linaro.org> References: <20210602154444.1077006-1-jean-philippe@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210602_085611_902451_CA2F85EF X-CRM114-Status: GOOD ( 24.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Passing a 64-bit address width to iommu_setup_dma_ops() is valid on virtual platforms, but isn't currently possible. The overflow check in iommu_dma_init_domain() prevents this even when @dma_base isn't 0. Pass a limit address instead of a size, so callers don't have to fake a size to work around the check. Signed-off-by: Jean-Philippe Brucker --- include/linux/dma-iommu.h | 4 ++-- arch/arm64/mm/dma-mapping.c | 2 +- drivers/iommu/amd/iommu.c | 2 +- drivers/iommu/dma-iommu.c | 12 ++++++------ drivers/iommu/intel/iommu.c | 2 +- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h index 6e75a2d689b4..758ca4694257 100644 --- a/include/linux/dma-iommu.h +++ b/include/linux/dma-iommu.h @@ -19,7 +19,7 @@ int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base); void iommu_put_dma_cookie(struct iommu_domain *domain); /* Setup call for arch DMA mapping code */ -void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size); +void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit); /* The DMA API isn't _quite_ the whole story, though... */ /* @@ -50,7 +50,7 @@ struct msi_msg; struct device; static inline void iommu_setup_dma_ops(struct device *dev, u64 dma_base, - u64 size) + u64 dma_limit) { } diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 4bf1dd3eb041..7bd1d2199141 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -50,7 +50,7 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, dev->dma_coherent = coherent; if (iommu) - iommu_setup_dma_ops(dev, dma_base, size); + iommu_setup_dma_ops(dev, dma_base, size - dma_base - 1); #ifdef CONFIG_XEN if (xen_swiotlb_detect()) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 3ac42bbdefc6..94b96d81fcfd 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1713,7 +1713,7 @@ static void amd_iommu_probe_finalize(struct device *dev) /* Domains are initialized for this device - have a look what we ended up with */ domain = iommu_get_domain_for_dev(dev); if (domain->type == IOMMU_DOMAIN_DMA) - iommu_setup_dma_ops(dev, IOVA_START_PFN << PAGE_SHIFT, 0); + iommu_setup_dma_ops(dev, IOVA_START_PFN << PAGE_SHIFT, U64_MAX); else set_dma_ops(dev, NULL); } diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 7bcdd1205535..c62e19bed302 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -319,16 +319,16 @@ static bool dev_is_untrusted(struct device *dev) * iommu_dma_init_domain - Initialise a DMA mapping domain * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() * @base: IOVA at which the mappable address space starts - * @size: Size of IOVA space + * @limit: Last address of the IOVA space * @dev: Device the domain is being initialised for * - * @base and @size should be exact multiples of IOMMU page granularity to + * @base and @limit + 1 should be exact multiples of IOMMU page granularity to * avoid rounding surprises. If necessary, we reserve the page at address 0 * to ensure it is an invalid IOVA. It is safe to reinitialise a domain, but * any change which could make prior IOVAs invalid will fail. */ static int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, - u64 size, struct device *dev) + dma_addr_t limit, struct device *dev) { struct iommu_dma_cookie *cookie = domain->iova_cookie; unsigned long order, base_pfn; @@ -346,7 +346,7 @@ static int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, /* Check the domain allows at least some access to the device... */ if (domain->geometry.force_aperture) { if (base > domain->geometry.aperture_end || - base + size <= domain->geometry.aperture_start) { + limit < domain->geometry.aperture_start) { pr_warn("specified DMA range outside IOMMU capability\n"); return -EFAULT; } @@ -1308,7 +1308,7 @@ static const struct dma_map_ops iommu_dma_ops = { * The IOMMU core code allocates the default DMA domain, which the underlying * IOMMU driver needs to support via the dma-iommu layer. */ -void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size) +void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit) { struct iommu_domain *domain = iommu_get_domain_for_dev(dev); @@ -1320,7 +1320,7 @@ void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size) * underlying IOMMU driver needs to support via the dma-iommu layer. */ if (domain->type == IOMMU_DOMAIN_DMA) { - if (iommu_dma_init_domain(domain, dma_base, size, dev)) + if (iommu_dma_init_domain(domain, dma_base, dma_limit, dev)) goto out_err; dev->dma_ops = &iommu_dma_ops; } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index be35284a2016..85f18342603c 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -5171,7 +5171,7 @@ static void intel_iommu_probe_finalize(struct device *dev) if (domain && domain->type == IOMMU_DOMAIN_DMA) iommu_setup_dma_ops(dev, base, - __DOMAIN_MAX_ADDR(dmar_domain->gaw) - base); + __DOMAIN_MAX_ADDR(dmar_domain->gaw)); else set_dma_ops(dev, NULL); }