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[2001:8b0:fb11:2681:55b2:e1:dcef:19cf]) by smtp.googlemail.com with ESMTPSA id a10sm12803883wrr.48.2021.06.13.14.52.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 13 Jun 2021 14:52:41 -0700 (PDT) From: Peter Robinson To: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Cc: Peter Robinson Subject: [PATCH 2/4] arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly Date: Sun, 13 Jun 2021 22:52:35 +0100 Message-Id: <20210613215237.830160-2-pbrobinson@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210613215237.830160-1-pbrobinson@gmail.com> References: <20210613215237.830160-1-pbrobinson@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210613_145343_134697_31429E45 X-CRM114-Status: GOOD ( 11.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds the RK3399 Firefly’s infrared receiver to its dts. Signed-off-by: Peter Robinson --- arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts index 6bbf79a370df..a5c2cdaa7798 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts @@ -94,6 +94,13 @@ power { }; }; + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&ir_int>; + pinctrl-names = "default"; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -595,6 +602,12 @@ pwrbtn: pwrbtn { }; }; + ir { + ir_int: ir-int { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + lcd-panel { lcd_panel_reset: lcd-panel-reset { rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;