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dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=nxp.com; Received: from DBBPR04MB7930.eurprd04.prod.outlook.com (2603:10a6:10:1ea::12) by DB7PR04MB5468.eurprd04.prod.outlook.com (2603:10a6:10:86::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.20; Fri, 25 Jun 2021 01:04:21 +0000 Received: from DBBPR04MB7930.eurprd04.prod.outlook.com ([fe80::3164:e047:376d:4a4f]) by DBBPR04MB7930.eurprd04.prod.outlook.com ([fe80::3164:e047:376d:4a4f%7]) with mapi id 15.20.4242.023; Fri, 25 Jun 2021 01:04:21 +0000 From: Jacky Bai To: robh+dt@kernel.org, shawnguo@kernel.org, sboyd@kernel.org, s.hauer@pengutronix.de, linus.walleij@linaro.org, aisheng.dong@nxp.com Cc: festevam@gmail.com, kernel@pengutronix.de, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 08/11] dt-bindings: arm: fsl: Add binding for imx8ulp evk Date: Fri, 25 Jun 2021 09:13:52 +0800 Message-Id: <20210625011355.3468586-9-ping.bai@nxp.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210625011355.3468586-1-ping.bai@nxp.com> References: <20210625011355.3468586-1-ping.bai@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SG2PR06CA0188.apcprd06.prod.outlook.com (2603:1096:4:1::20) To DBBPR04MB7930.eurprd04.prod.outlook.com (2603:10a6:10:1ea::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SG2PR06CA0188.apcprd06.prod.outlook.com (2603:1096:4:1::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.18 via Frontend Transport; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the dt binding for i.MX8ULP EVK board. i.MX 8ULP is part of the ULP family with emphasis on extreme low-power techniques using the 28 nm fully depleted silicon on insulator process. Like i.MX 7ULP, i.MX 8ULP continues to be based on asymmetric architecture, however will add a third DSP domain for advanced voice/audio capability and a Graphics domain where it is possible to access graphics resources from the application side or the realtime side. Signed-off-by: Jacky Bai Reviewed-by: Dong Aisheng Acked-by: Rob Herring --- - v3 changes: no - v2 changes: no --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index fce2a8670b49..e68a1b43b144 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -788,6 +788,12 @@ properties: - const: toradex,colibri-imx8x - const: fsl,imx8qxp + - description: i.MX8ULP based Boards + items: + - enum: + - fsl,imx8ulp-evk # i.MX8ULP EVK Board + - const: fsl,imx8ulp + - description: Freescale Vybrid Platform Device Tree Bindings