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Sat, 26 Jun 2021 10:28:40 +0000 Received: from xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Sat, 26 Jun 2021 03:28:24 -0700 Received: from smtp.xilinx.com (172.19.127.96) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Sat, 26 Jun 2021 03:28:24 -0700 Received: from [10.140.6.6] (port=55646 helo=xhdappanad40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lx5Xz-000AWJ-4c; Sat, 26 Jun 2021 03:28:23 -0700 From: Raviteja Narayanam To: , CC: , , , , , Raviteja Narayanam Subject: [PATCH v2 03/10] i2c: xiic: Switch to Xiic standard mode for i2c-read Date: Sat, 26 Jun 2021 15:57:59 +0530 Message-ID: <20210626102806.15402-4-raviteja.narayanam@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210626102806.15402-1-raviteja.narayanam@xilinx.com> References: <20210626102806.15402-1-raviteja.narayanam@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e1586486-46d5-4f96-519c-08d9388d2adc X-MS-TrafficTypeDiagnostic: CO6PR02MB7745: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:6108; 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CAT:NONE; SFS:(4636009)(396003)(39860400002)(136003)(376002)(346002)(36840700001)(46966006)(8936002)(4326008)(1076003)(6666004)(36756003)(44832011)(2616005)(356005)(426003)(316002)(36906005)(47076005)(82310400003)(9786002)(83380400001)(8676002)(82740400003)(5660300002)(107886003)(7696005)(6636002)(336012)(36860700001)(478600001)(2906002)(26005)(186003)(70206006)(70586007)(7636003)(110136005)(54906003)(102446001); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jun 2021 10:28:40.9462 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e1586486-46d5-4f96-519c-08d9388d2adc X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0061.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR02MB7745 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210626_032843_484952_D408DEBD X-CRM114-Status: GOOD ( 19.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Xilinx I2C IP has two modes of operation, both of which implement I2C transactions. The only difference from sw perspective is the programming sequence for these modes. Dynamic mode -> Simple to program, less number of steps in sequence. Standard mode -> Gives flexibility, more number of steps in sequence. In dynamic mode, during the i2c-read transactions, if there is a delay(> 200us) between the register writes (address & byte count), read transaction fails. On a system with load, this scenario is occurring frequently. To avoid this, switch to standard mode if there is a read request. Added a quirk to identify the IP version effected by this and follow the standard mode. Signed-off-by: Raviteja Narayanam --- drivers/i2c/busses/i2c-xiic.c | 54 ++++++++++++++++++++++++++++------- 1 file changed, 43 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 004103267e9c..c31d0d0a8384 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -33,6 +33,8 @@ #define DRIVER_NAME "xiic-i2c" +#define DYNAMIC_MODE_READ_BROKEN_BIT BIT(0) + enum xilinx_i2c_state { STATE_DONE, STATE_ERROR, @@ -62,6 +64,7 @@ enum xiic_endian { * @singlemaster: Indicates bus is single master * @dynamic: Mode of controller * @prev_msg_tx: Previous message is Tx + * @quirks: To hold platform specific bug info */ struct xiic_i2c { struct device *dev; @@ -80,8 +83,12 @@ struct xiic_i2c { bool singlemaster; bool dynamic; bool prev_msg_tx; + u32 quirks; }; +struct xiic_version_data { + u32 quirks; +}; #define XIIC_MSB_OFFSET 0 #define XIIC_REG_OFFSET (0x100+XIIC_MSB_OFFSET) @@ -963,6 +970,7 @@ static int xiic_start_xfer(struct xiic_i2c *i2c) static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { + bool broken_read, max_read_len; struct xiic_i2c *i2c = i2c_get_adapdata(adap); int err, count; @@ -986,10 +994,21 @@ static int xiic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) /* Initialize prev message type */ i2c->prev_msg_tx = false; - /* Enter standard mode only when read length is > 255 bytes */ + /* + * Scan through nmsgs, use dynamic mode when none of the below two + * conditions occur. We need standard mode even if one condition holds + * true in the entire array of messages in a single transfer. + * If read transaction as dynamic mode is broken for delayed reads + * in xlnx,axi-iic-2.0 / xlnx,xps-iic-2.00.a IP versions. + * If read length is > 255 bytes. + */ for (count = 0; count < i2c->nmsgs; count++) { - if ((i2c->tx_msg[count].flags & I2C_M_RD) && - i2c->tx_msg[count].len > MAX_READ_LENGTH_DYNAMIC) { + broken_read = (i2c->quirks & DYNAMIC_MODE_READ_BROKEN_BIT) && + (i2c->tx_msg[count].flags & I2C_M_RD); + max_read_len = (i2c->tx_msg[count].flags & I2C_M_RD) && + (i2c->tx_msg[count].len > MAX_READ_LENGTH_DYNAMIC); + + if (broken_read || max_read_len) { i2c->dynamic = false; break; } @@ -1035,11 +1054,23 @@ static const struct i2c_adapter xiic_adapter = { .algo = &xiic_algorithm, }; +static const struct xiic_version_data xiic_2_00 = { + .quirks = DYNAMIC_MODE_READ_BROKEN_BIT, +}; + +#if defined(CONFIG_OF) +static const struct of_device_id xiic_of_match[] = { + { .compatible = "xlnx,xps-iic-2.00.a", .data = &xiic_2_00 }, + {}, +}; +MODULE_DEVICE_TABLE(of, xiic_of_match); +#endif static int xiic_i2c_probe(struct platform_device *pdev) { struct xiic_i2c *i2c; struct xiic_i2c_platform_data *pdata; + const struct of_device_id *match; struct resource *res; int ret, irq; u8 i; @@ -1049,6 +1080,13 @@ static int xiic_i2c_probe(struct platform_device *pdev) if (!i2c) return -ENOMEM; + match = of_match_node(xiic_of_match, pdev->dev.of_node); + if (match && match->data) { + const struct xiic_version_data *data = match->data; + + i2c->quirks = data->quirks; + } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); i2c->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(i2c->base)) @@ -1129,6 +1167,8 @@ static int xiic_i2c_probe(struct platform_device *pdev) i2c_new_client_device(&i2c->adap, pdata->devices + i); } + dev_info(&pdev->dev, "mmio %08lx irq %d\n", (unsigned long)res->start, irq); + return 0; err_clk_dis: @@ -1160,14 +1200,6 @@ static int xiic_i2c_remove(struct platform_device *pdev) return 0; } -#if defined(CONFIG_OF) -static const struct of_device_id xiic_of_match[] = { - { .compatible = "xlnx,xps-iic-2.00.a", }, - {}, -}; -MODULE_DEVICE_TABLE(of, xiic_of_match); -#endif - static int __maybe_unused xiic_i2c_runtime_suspend(struct device *dev) { struct xiic_i2c *i2c = dev_get_drvdata(dev);