| Message ID | 20210704090230.26489-7-jagan@amarulasolutions.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm: bridge: Samsung MIPI DSIM bridge | expand |
On Sun, Jul 04, 2021 at 02:32:19PM +0530, Jagan Teki wrote: > Exynos DSI driver is actually a Samsung MIPI DSIM bridge > IP which is also used in i.MX8MM platforms. > > Right now the existing driver has some exynos drm specific > code bases like te_irq, crtc and component_ops. > > In order to switch this driver into a common bridge driver > We can see 2 options to handle the exynos specific code. > > A. Drop the component_ops, and rework other specifics. > This may lead to more foundation work as it requires > more changes in exynos drm drivers stack. > > B. Handle the exynos specifics via driver data, and make > the common bridge work in different platforms and plan > for option A in future. > > So, this patch is trying to add option B) changes to handle > exynos specifics via driver_data. We really should find someone that has the time, energy, knowledge and hardware that can include device_link support once anf for all for bridges. Then we would avoid hacks like this. I see no other options at the moment, but look forward for a better solution. Sam > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 37 +++++++++++++++++++------ > 1 file changed, 29 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > index 99a1b8c22313..53d878d4d2d7 100644 > --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c > +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > @@ -250,6 +250,7 @@ struct exynos_dsi_driver_data { > unsigned int wait_for_reset; > unsigned int num_bits_resol; > const unsigned int *reg_values; > + bool exynos_specific; > }; > > struct exynos_dsi { > @@ -459,6 +460,7 @@ static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { > .wait_for_reset = 1, > .num_bits_resol = 11, > .reg_values = reg_values, > + .exynos_specific = true, > }; > > static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { > @@ -471,6 +473,7 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { > .wait_for_reset = 1, > .num_bits_resol = 11, > .reg_values = reg_values, > + .exynos_specific = true, > }; > > static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { > @@ -481,6 +484,7 @@ static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { > .wait_for_reset = 1, > .num_bits_resol = 11, > .reg_values = reg_values, > + .exynos_specific = true, > }; > > static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { > @@ -492,6 +496,7 @@ static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { > .wait_for_reset = 0, > .num_bits_resol = 12, > .reg_values = exynos5433_reg_values, > + .exynos_specific = true, > }; > > static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { > @@ -503,6 +508,7 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { > .wait_for_reset = 1, > .num_bits_resol = 12, > .reg_values = exynos5422_reg_values, > + .exynos_specific = true, > }; > > static const struct of_device_id exynos_dsi_of_match[] = { > @@ -1484,7 +1490,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, > * If attached panel device is for command mode one, dsi should register > * TE interrupt handler. > */ > - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { > + if (dsi->driver_data->exynos_specific && > + !(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { > int ret = exynos_dsi_register_te_irq(dsi, &device->dev); > if (ret) > return ret; > @@ -1495,8 +1502,9 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, > dsi->lanes = device->lanes; > dsi->format = device->format; > dsi->mode_flags = device->mode_flags; > - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = > - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); > + if (dsi->driver_data->exynos_specific) > + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = > + !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); > > mutex_unlock(&drm->mode_config.mutex); > > @@ -1515,7 +1523,8 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, > if (drm->mode_config.poll_enabled) > drm_kms_helper_hotplug_event(drm); > > - exynos_dsi_unregister_te_irq(dsi); > + if (dsi->driver_data->exynos_specific) > + exynos_dsi_unregister_te_irq(dsi); > > return 0; > } > @@ -1737,6 +1746,15 @@ static int exynos_dsi_probe(struct platform_device *pdev) > if (ret) > return ret; > > + if (!dsi->driver_data->exynos_specific) { > + ret = mipi_dsi_host_register(&dsi->dsi_host); > + if (ret) { > + dev_err(dev, "failed to register mipi dsi host: %d\n", > + ret); > + return ret; > + } > + } > + > platform_set_drvdata(pdev, dsi); > > pm_runtime_enable(dev); > @@ -1747,9 +1765,11 @@ static int exynos_dsi_probe(struct platform_device *pdev) > > drm_bridge_add(&dsi->bridge); > > - ret = component_add(dev, &exynos_dsi_component_ops); > - if (ret) > - goto err_disable_runtime; > + if (dsi->driver_data->exynos_specific) { > + ret = component_add(dev, &exynos_dsi_component_ops); > + if (ret) > + goto err_disable_runtime; > + } > > return 0; > > @@ -1767,7 +1787,8 @@ static int exynos_dsi_remove(struct platform_device *pdev) > > pm_runtime_disable(&pdev->dev); > > - component_del(&pdev->dev, &exynos_dsi_component_ops); > + if (dsi->driver_data->exynos_specific) > + component_del(&pdev->dev, &exynos_dsi_component_ops); > > return 0; > } > -- > 2.25.1
On Sun, Jul 25, 2021 at 10:55 PM Sam Ravnborg <sam@ravnborg.org> wrote: > > On Sun, Jul 04, 2021 at 02:32:19PM +0530, Jagan Teki wrote: > > Exynos DSI driver is actually a Samsung MIPI DSIM bridge > > IP which is also used in i.MX8MM platforms. > > > > Right now the existing driver has some exynos drm specific > > code bases like te_irq, crtc and component_ops. > > > > In order to switch this driver into a common bridge driver > > We can see 2 options to handle the exynos specific code. > > > > A. Drop the component_ops, and rework other specifics. > > This may lead to more foundation work as it requires > > more changes in exynos drm drivers stack. > > > > B. Handle the exynos specifics via driver data, and make > > the common bridge work in different platforms and plan > > for option A in future. > > > > So, this patch is trying to add option B) changes to handle > > exynos specifics via driver_data. > > We really should find someone that has the time, energy, knowledge and > hardware that can include device_link support once anf for all for > bridges. > Then we would avoid hacks like this. > > I see no other options at the moment, but look forward for a better > solution. The real key problem here is hardware, unfortunately I'm unable to find any proper exynos DSI hardware for myself to proceed atleast. Thanks, Jagan.
Hi, 21. 7. 26. 오전 2:25에 Sam Ravnborg 이(가) 쓴 글: > On Sun, Jul 04, 2021 at 02:32:19PM +0530, Jagan Teki wrote: >> Exynos DSI driver is actually a Samsung MIPI DSIM bridge >> IP which is also used in i.MX8MM platforms. >> >> Right now the existing driver has some exynos drm specific >> code bases like te_irq, crtc and component_ops. >> >> In order to switch this driver into a common bridge driver >> We can see 2 options to handle the exynos specific code. >> >> A. Drop the component_ops, and rework other specifics. >> This may lead to more foundation work as it requires >> more changes in exynos drm drivers stack. >> >> B. Handle the exynos specifics via driver data, and make >> the common bridge work in different platforms and plan >> for option A in future. >> >> So, this patch is trying to add option B) changes to handle >> exynos specifics via driver_data. > > We really should find someone that has the time, energy, knowledge and > hardware that can include device_link support once anf for all for > bridges. > Then we would avoid hacks like this. > > I see no other options at the moment, but look forward for a better > solution. > > Sam > I'm not sure that it's correct to share this mipi dsi driver with I.MX8MM SoC even though it's a same IP because this MIPI DSI device isn't peripheral device but in SoC. It would mean that Exynos MIPI DSI device depends on SoC architecture, and Exynos and I.MX series are totally different SoC. So if we share the same driver for the MIPI DSI device then many things we didn't predict may happen in the future. I don't want to make Jagan's efforts in vain for the community but clarify whether this is correct way or not. If this is only the way we have to go then we could more focus on actual solution not such hack. Impossible work with Jagan alone I think. So let's get started with a question, - Is MIPI-DSI bridge device or Encoder device? I think that MIPI-DSI is a Encoder device managed by atomic KMS. If MIPI-DSI should be handled as bridge device then does now drm bridge framework provide everything to share one driver with one more SoC? I mean something that drm bridge has to consider for such driver support, which is shared with one more SoC. And Display mode - VIDEO and COMMAND mode - is generic type of MIPI DSI, and also componentised subsystem is a generic solution to resolve probing order issue not Exynos specific feature. These are driver specific ones not Exynos SoC I think. As SoC specific things should be considered, I think MIPI DSI Driver - interrupt handler and probing order things are really specific to device driver - should be separated but we could share the control part of the device. I was busy with other projects so didn't care of Linux DRM world so there may be my missing something. Thanks, Inki Dae > >> >> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> >> --- >> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 37 +++++++++++++++++++------ >> 1 file changed, 29 insertions(+), 8 deletions(-) >> >> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c >> index 99a1b8c22313..53d878d4d2d7 100644 >> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c >> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c >> @@ -250,6 +250,7 @@ struct exynos_dsi_driver_data { >> unsigned int wait_for_reset; >> unsigned int num_bits_resol; >> const unsigned int *reg_values; >> + bool exynos_specific; >> }; >> >> struct exynos_dsi { >> @@ -459,6 +460,7 @@ static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { >> .wait_for_reset = 1, >> .num_bits_resol = 11, >> .reg_values = reg_values, >> + .exynos_specific = true, >> }; >> >> static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { >> @@ -471,6 +473,7 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { >> .wait_for_reset = 1, >> .num_bits_resol = 11, >> .reg_values = reg_values, >> + .exynos_specific = true, >> }; >> >> static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { >> @@ -481,6 +484,7 @@ static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { >> .wait_for_reset = 1, >> .num_bits_resol = 11, >> .reg_values = reg_values, >> + .exynos_specific = true, >> }; >> >> static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { >> @@ -492,6 +496,7 @@ static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { >> .wait_for_reset = 0, >> .num_bits_resol = 12, >> .reg_values = exynos5433_reg_values, >> + .exynos_specific = true, >> }; >> >> static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { >> @@ -503,6 +508,7 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { >> .wait_for_reset = 1, >> .num_bits_resol = 12, >> .reg_values = exynos5422_reg_values, >> + .exynos_specific = true, >> }; >> >> static const struct of_device_id exynos_dsi_of_match[] = { >> @@ -1484,7 +1490,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, >> * If attached panel device is for command mode one, dsi should register >> * TE interrupt handler. >> */ >> - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { >> + if (dsi->driver_data->exynos_specific && >> + !(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { >> int ret = exynos_dsi_register_te_irq(dsi, &device->dev); >> if (ret) >> return ret; >> @@ -1495,8 +1502,9 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, >> dsi->lanes = device->lanes; >> dsi->format = device->format; >> dsi->mode_flags = device->mode_flags; >> - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = >> - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); >> + if (dsi->driver_data->exynos_specific) >> + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = >> + !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); >> >> mutex_unlock(&drm->mode_config.mutex); >> >> @@ -1515,7 +1523,8 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, >> if (drm->mode_config.poll_enabled) >> drm_kms_helper_hotplug_event(drm); >> >> - exynos_dsi_unregister_te_irq(dsi); >> + if (dsi->driver_data->exynos_specific) >> + exynos_dsi_unregister_te_irq(dsi); >> >> return 0; >> } >> @@ -1737,6 +1746,15 @@ static int exynos_dsi_probe(struct platform_device *pdev) >> if (ret) >> return ret; >> >> + if (!dsi->driver_data->exynos_specific) { >> + ret = mipi_dsi_host_register(&dsi->dsi_host); >> + if (ret) { >> + dev_err(dev, "failed to register mipi dsi host: %d\n", >> + ret); >> + return ret; >> + } >> + } >> + >> platform_set_drvdata(pdev, dsi); >> >> pm_runtime_enable(dev); >> @@ -1747,9 +1765,11 @@ static int exynos_dsi_probe(struct platform_device *pdev) >> >> drm_bridge_add(&dsi->bridge); >> >> - ret = component_add(dev, &exynos_dsi_component_ops); >> - if (ret) >> - goto err_disable_runtime; >> + if (dsi->driver_data->exynos_specific) { >> + ret = component_add(dev, &exynos_dsi_component_ops); >> + if (ret) >> + goto err_disable_runtime; >> + } >> >> return 0; >> >> @@ -1767,7 +1787,8 @@ static int exynos_dsi_remove(struct platform_device *pdev) >> >> pm_runtime_disable(&pdev->dev); >> >> - component_del(&pdev->dev, &exynos_dsi_component_ops); >> + if (dsi->driver_data->exynos_specific) >> + component_del(&pdev->dev, &exynos_dsi_component_ops); >> >> return 0; >> } >> -- >> 2.25.1 >
Hi Inki, On Fri, Aug 13, 2021 at 03:50:56PM +0900, Inki Dae wrote: > 21. 7. 26. 오전 2:25에 Sam Ravnborg 이(가) 쓴 글: > > On Sun, Jul 04, 2021 at 02:32:19PM +0530, Jagan Teki wrote: > >> Exynos DSI driver is actually a Samsung MIPI DSIM bridge > >> IP which is also used in i.MX8MM platforms. > >> > >> Right now the existing driver has some exynos drm specific > >> code bases like te_irq, crtc and component_ops. > >> > >> In order to switch this driver into a common bridge driver > >> We can see 2 options to handle the exynos specific code. > >> > >> A. Drop the component_ops, and rework other specifics. > >> This may lead to more foundation work as it requires > >> more changes in exynos drm drivers stack. > >> > >> B. Handle the exynos specifics via driver data, and make > >> the common bridge work in different platforms and plan > >> for option A in future. > >> > >> So, this patch is trying to add option B) changes to handle > >> exynos specifics via driver_data. > > > > We really should find someone that has the time, energy, knowledge and > > hardware that can include device_link support once anf for all for > > bridges. > > Then we would avoid hacks like this. > > > > I see no other options at the moment, but look forward for a better > > solution. > > I'm not sure that it's correct to share this mipi dsi driver with > I.MX8MM SoC even though it's a same IP because this MIPI DSI device > isn't peripheral device but in SoC. > > It would mean that Exynos MIPI DSI device depends on SoC architecture, > and Exynos and I.MX series are totally different SoC. So if we share > the same driver for the MIPI DSI device then many things we didn't > predict may happen in the future. Isn't that true for external components true thought ? Any driver shared by multiple systems will face this issue, where it will be developed with some use cases in mind, and regressions may happen when the driver is then extended to support other use cases not required for the original platform. In general we don't want multiple drivers for the same IP core unless there are valid technical reasons for that. It's the whole point of the device tree, being able to describe how IP cores are integrated, so that code can be reused across platforms. Of course, integration differences between SoCs can sometimes vary wildly and require some amount of glue code. > I don't want to make Jagan's efforts > in vain for the community but clarify whether this is correct way or > not. If this is only the way we have to go then we could more focus on > actual solution not such hack. Impossible work with Jagan alone I > think. I do agree that we need more correct solutions and less hacks in general :-) The issues faced on Exynos also exist on other platforms, so it would be much better to solve them well once that duplicating implementations with less test coverage and reviews. There have been efforts in the past to address some of these issues, which have resulted in solutions such as the component framework. However, I'd argued that we've never taken it to the last step, and have always stopped with half solutions. The component framework, for instance, is painful to use, and the handling of .remove() in most drivers is completely broken because of that (not just because of that though, we have issues in the DRM core that make hot-unplug just impossible to handle safetly). > So let's get started with a question, > - Is MIPI-DSI bridge device or Encoder device? I think that MIPI-DSI > is a Encoder device managed by atomic KMS. If MIPI-DSI should be > handled as bridge device then does now drm bridge framework provide > everything to share one driver with one more SoC? I mean something > that drm bridge has to consider for such driver support, which is > shared with one more SoC. The DRM "encoder" concept was a bit of a historical mistake that we are stuck with as drm_encoder is exposed to userspace. It comes from a time where nobody was envisioning chaining multiple encoders. DRM is moving to modelling every component after the CRTC as a bridge. This brings much more flexibility, and in that model, the drm_encoder becomes more or less a stub. The DRM bridge API has been extended in the past to support more features, and if anything is still missing that makes it difficult to move away from drm_encoder, we can of course address the issues in drm_bridge. > And Display mode - VIDEO and COMMAND mode - is generic type of MIPI > DSI, and also componentised subsystem is a generic solution to resolve > probing order issue not Exynos specific feature. These are driver > specific ones not Exynos SoC I think. As SoC specific things should be > considered, I think MIPI DSI Driver - interrupt handler and probing > order things are really specific to device driver - should be > separated but we could share the control part of the device. > > I was busy with other projects so didn't care of Linux DRM world so > there may be my missing something. > > >> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > >> --- > >> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 37 +++++++++++++++++++------ > >> 1 file changed, 29 insertions(+), 8 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > >> index 99a1b8c22313..53d878d4d2d7 100644 > >> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c > >> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c > >> @@ -250,6 +250,7 @@ struct exynos_dsi_driver_data { > >> unsigned int wait_for_reset; > >> unsigned int num_bits_resol; > >> const unsigned int *reg_values; > >> + bool exynos_specific; > >> }; > >> > >> struct exynos_dsi { > >> @@ -459,6 +460,7 @@ static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { > >> .wait_for_reset = 1, > >> .num_bits_resol = 11, > >> .reg_values = reg_values, > >> + .exynos_specific = true, > >> }; > >> > >> static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { > >> @@ -471,6 +473,7 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { > >> .wait_for_reset = 1, > >> .num_bits_resol = 11, > >> .reg_values = reg_values, > >> + .exynos_specific = true, > >> }; > >> > >> static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { > >> @@ -481,6 +484,7 @@ static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { > >> .wait_for_reset = 1, > >> .num_bits_resol = 11, > >> .reg_values = reg_values, > >> + .exynos_specific = true, > >> }; > >> > >> static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { > >> @@ -492,6 +496,7 @@ static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { > >> .wait_for_reset = 0, > >> .num_bits_resol = 12, > >> .reg_values = exynos5433_reg_values, > >> + .exynos_specific = true, > >> }; > >> > >> static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { > >> @@ -503,6 +508,7 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { > >> .wait_for_reset = 1, > >> .num_bits_resol = 12, > >> .reg_values = exynos5422_reg_values, > >> + .exynos_specific = true, > >> }; > >> > >> static const struct of_device_id exynos_dsi_of_match[] = { > >> @@ -1484,7 +1490,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, > >> * If attached panel device is for command mode one, dsi should register > >> * TE interrupt handler. > >> */ > >> - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { > >> + if (dsi->driver_data->exynos_specific && > >> + !(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { > >> int ret = exynos_dsi_register_te_irq(dsi, &device->dev); > >> if (ret) > >> return ret; > >> @@ -1495,8 +1502,9 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, > >> dsi->lanes = device->lanes; > >> dsi->format = device->format; > >> dsi->mode_flags = device->mode_flags; > >> - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = > >> - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); > >> + if (dsi->driver_data->exynos_specific) > >> + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = > >> + !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); > >> > >> mutex_unlock(&drm->mode_config.mutex); > >> > >> @@ -1515,7 +1523,8 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, > >> if (drm->mode_config.poll_enabled) > >> drm_kms_helper_hotplug_event(drm); > >> > >> - exynos_dsi_unregister_te_irq(dsi); > >> + if (dsi->driver_data->exynos_specific) > >> + exynos_dsi_unregister_te_irq(dsi); > >> > >> return 0; > >> } > >> @@ -1737,6 +1746,15 @@ static int exynos_dsi_probe(struct platform_device *pdev) > >> if (ret) > >> return ret; > >> > >> + if (!dsi->driver_data->exynos_specific) { > >> + ret = mipi_dsi_host_register(&dsi->dsi_host); > >> + if (ret) { > >> + dev_err(dev, "failed to register mipi dsi host: %d\n", > >> + ret); > >> + return ret; > >> + } > >> + } > >> + > >> platform_set_drvdata(pdev, dsi); > >> > >> pm_runtime_enable(dev); > >> @@ -1747,9 +1765,11 @@ static int exynos_dsi_probe(struct platform_device *pdev) > >> > >> drm_bridge_add(&dsi->bridge); > >> > >> - ret = component_add(dev, &exynos_dsi_component_ops); > >> - if (ret) > >> - goto err_disable_runtime; > >> + if (dsi->driver_data->exynos_specific) { > >> + ret = component_add(dev, &exynos_dsi_component_ops); > >> + if (ret) > >> + goto err_disable_runtime; > >> + } > >> > >> return 0; > >> > >> @@ -1767,7 +1787,8 @@ static int exynos_dsi_remove(struct platform_device *pdev) > >> > >> pm_runtime_disable(&pdev->dev); > >> > >> - component_del(&pdev->dev, &exynos_dsi_component_ops); > >> + if (dsi->driver_data->exynos_specific) > >> + component_del(&pdev->dev, &exynos_dsi_component_ops); > >> > >> return 0; > >> }
Hi Laurent, 21. 8. 13. 오후 9:16에 Laurent Pinchart 이(가) 쓴 글: > Hi Inki, > > On Fri, Aug 13, 2021 at 03:50:56PM +0900, Inki Dae wrote: >> 21. 7. 26. 오전 2:25에 Sam Ravnborg 이(가) 쓴 글: >>> On Sun, Jul 04, 2021 at 02:32:19PM +0530, Jagan Teki wrote: >>>> Exynos DSI driver is actually a Samsung MIPI DSIM bridge >>>> IP which is also used in i.MX8MM platforms. >>>> >>>> Right now the existing driver has some exynos drm specific >>>> code bases like te_irq, crtc and component_ops. >>>> >>>> In order to switch this driver into a common bridge driver >>>> We can see 2 options to handle the exynos specific code. >>>> >>>> A. Drop the component_ops, and rework other specifics. >>>> This may lead to more foundation work as it requires >>>> more changes in exynos drm drivers stack. >>>> >>>> B. Handle the exynos specifics via driver data, and make >>>> the common bridge work in different platforms and plan >>>> for option A in future. >>>> >>>> So, this patch is trying to add option B) changes to handle >>>> exynos specifics via driver_data. >>> >>> We really should find someone that has the time, energy, knowledge and >>> hardware that can include device_link support once anf for all for >>> bridges. >>> Then we would avoid hacks like this. >>> >>> I see no other options at the moment, but look forward for a better >>> solution. >> >> I'm not sure that it's correct to share this mipi dsi driver with >> I.MX8MM SoC even though it's a same IP because this MIPI DSI device >> isn't peripheral device but in SoC. >> >> It would mean that Exynos MIPI DSI device depends on SoC architecture, >> and Exynos and I.MX series are totally different SoC. So if we share >> the same driver for the MIPI DSI device then many things we didn't >> predict may happen in the future. > > Isn't that true for external components true thought ? Any driver shared > by multiple systems will face this issue, where it will be developed > with some use cases in mind, and regressions may happen when the driver > is then extended to support other use cases not required for the > original platform. > > In general we don't want multiple drivers for the same IP core unless > there are valid technical reasons for that. It's the whole point of the > device tree, being able to describe how IP cores are integrated, so that > code can be reused across platforms. Of course, integration differences > between SoCs can sometimes vary wildly and require some amount of glue > code. Agree with you. It would be a good chance to clarify what we need to share same device driver without any regress in this time. > >> I don't want to make Jagan's efforts >> in vain for the community but clarify whether this is correct way or >> not. If this is only the way we have to go then we could more focus on >> actual solution not such hack. Impossible work with Jagan alone I >> think. > > I do agree that we need more correct solutions and less hacks in general > :-) The issues faced on Exynos also exist on other platforms, so it > would be much better to solve them well once that duplicating > implementations with less test coverage and reviews. There have been > efforts in the past to address some of these issues, which have resulted > in solutions such as the component framework. However, I'd argued that Yeah, most of ARM systems have various separate devices but DRM subsytem wanted each ARM driver to work like one device driver for all of them. And the component framework has been adopted by several ARM DRM drivers for it including Exynos. > we've never taken it to the last step, and have always stopped with half > solutions. The component framework, for instance, is painful to use, and > the handling of .remove() in most drivers is completely broken because > of that (not just because of that though, we have issues in the DRM core > that make hot-unplug just impossible to handle safetly). This may be one of what we have to clarify. I think ARM DRM drivers need component framework or similar thing to address probing order issue. So would we need to enhance existing compoent framework to be suitable for DRM subsystem, or introducing an alternative solution? Otherwise, would there be some way to address the probing order issue without the compoment framework? > >> So let's get started with a question, >> - Is MIPI-DSI bridge device or Encoder device? I think that MIPI-DSI >> is a Encoder device managed by atomic KMS. If MIPI-DSI should be >> handled as bridge device then does now drm bridge framework provide >> everything to share one driver with one more SoC? I mean something >> that drm bridge has to consider for such driver support, which is >> shared with one more SoC. > > The DRM "encoder" concept was a bit of a historical mistake that we are > stuck with as drm_encoder is exposed to userspace. It comes from a time > where nobody was envisioning chaining multiple encoders. DRM is moving > to modelling every component after the CRTC as a bridge. This brings Thanks for explanation and seems correct direction. :) However, there would be something we have to address before changing the existing modeling because any regress shouldn't be allowed. Thanks, Inki Dae > much more flexibility, and in that model, the drm_encoder becomes more > or less a stub. > > The DRM bridge API has been extended in the past to support more > features, and if anything is still missing that makes it difficult to > move away from drm_encoder, we can of course address the issues in > drm_bridge. > >> And Display mode - VIDEO and COMMAND mode - is generic type of MIPI >> DSI, and also componentised subsystem is a generic solution to resolve >> probing order issue not Exynos specific feature. These are driver >> specific ones not Exynos SoC I think. As SoC specific things should be >> considered, I think MIPI DSI Driver - interrupt handler and probing >> order things are really specific to device driver - should be >> separated but we could share the control part of the device. >> >> I was busy with other projects so didn't care of Linux DRM world so >> there may be my missing something. >> >>>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> >>>> --- >>>> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 37 +++++++++++++++++++------ >>>> 1 file changed, 29 insertions(+), 8 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c >>>> index 99a1b8c22313..53d878d4d2d7 100644 >>>> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c >>>> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c >>>> @@ -250,6 +250,7 @@ struct exynos_dsi_driver_data { >>>> unsigned int wait_for_reset; >>>> unsigned int num_bits_resol; >>>> const unsigned int *reg_values; >>>> + bool exynos_specific; >>>> }; >>>> >>>> struct exynos_dsi { >>>> @@ -459,6 +460,7 @@ static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { >>>> .wait_for_reset = 1, >>>> .num_bits_resol = 11, >>>> .reg_values = reg_values, >>>> + .exynos_specific = true, >>>> }; >>>> >>>> static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { >>>> @@ -471,6 +473,7 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { >>>> .wait_for_reset = 1, >>>> .num_bits_resol = 11, >>>> .reg_values = reg_values, >>>> + .exynos_specific = true, >>>> }; >>>> >>>> static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { >>>> @@ -481,6 +484,7 @@ static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { >>>> .wait_for_reset = 1, >>>> .num_bits_resol = 11, >>>> .reg_values = reg_values, >>>> + .exynos_specific = true, >>>> }; >>>> >>>> static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { >>>> @@ -492,6 +496,7 @@ static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { >>>> .wait_for_reset = 0, >>>> .num_bits_resol = 12, >>>> .reg_values = exynos5433_reg_values, >>>> + .exynos_specific = true, >>>> }; >>>> >>>> static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { >>>> @@ -503,6 +508,7 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { >>>> .wait_for_reset = 1, >>>> .num_bits_resol = 12, >>>> .reg_values = exynos5422_reg_values, >>>> + .exynos_specific = true, >>>> }; >>>> >>>> static const struct of_device_id exynos_dsi_of_match[] = { >>>> @@ -1484,7 +1490,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, >>>> * If attached panel device is for command mode one, dsi should register >>>> * TE interrupt handler. >>>> */ >>>> - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { >>>> + if (dsi->driver_data->exynos_specific && >>>> + !(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { >>>> int ret = exynos_dsi_register_te_irq(dsi, &device->dev); >>>> if (ret) >>>> return ret; >>>> @@ -1495,8 +1502,9 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, >>>> dsi->lanes = device->lanes; >>>> dsi->format = device->format; >>>> dsi->mode_flags = device->mode_flags; >>>> - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = >>>> - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); >>>> + if (dsi->driver_data->exynos_specific) >>>> + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = >>>> + !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); >>>> >>>> mutex_unlock(&drm->mode_config.mutex); >>>> >>>> @@ -1515,7 +1523,8 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, >>>> if (drm->mode_config.poll_enabled) >>>> drm_kms_helper_hotplug_event(drm); >>>> >>>> - exynos_dsi_unregister_te_irq(dsi); >>>> + if (dsi->driver_data->exynos_specific) >>>> + exynos_dsi_unregister_te_irq(dsi); >>>> >>>> return 0; >>>> } >>>> @@ -1737,6 +1746,15 @@ static int exynos_dsi_probe(struct platform_device *pdev) >>>> if (ret) >>>> return ret; >>>> >>>> + if (!dsi->driver_data->exynos_specific) { >>>> + ret = mipi_dsi_host_register(&dsi->dsi_host); >>>> + if (ret) { >>>> + dev_err(dev, "failed to register mipi dsi host: %d\n", >>>> + ret); >>>> + return ret; >>>> + } >>>> + } >>>> + >>>> platform_set_drvdata(pdev, dsi); >>>> >>>> pm_runtime_enable(dev); >>>> @@ -1747,9 +1765,11 @@ static int exynos_dsi_probe(struct platform_device *pdev) >>>> >>>> drm_bridge_add(&dsi->bridge); >>>> >>>> - ret = component_add(dev, &exynos_dsi_component_ops); >>>> - if (ret) >>>> - goto err_disable_runtime; >>>> + if (dsi->driver_data->exynos_specific) { >>>> + ret = component_add(dev, &exynos_dsi_component_ops); >>>> + if (ret) >>>> + goto err_disable_runtime; >>>> + } >>>> >>>> return 0; >>>> >>>> @@ -1767,7 +1787,8 @@ static int exynos_dsi_remove(struct platform_device *pdev) >>>> >>>> pm_runtime_disable(&pdev->dev); >>>> >>>> - component_del(&pdev->dev, &exynos_dsi_component_ops); >>>> + if (dsi->driver_data->exynos_specific) >>>> + component_del(&pdev->dev, &exynos_dsi_component_ops); >>>> >>>> return 0; >>>> } >
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 99a1b8c22313..53d878d4d2d7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -250,6 +250,7 @@ struct exynos_dsi_driver_data { unsigned int wait_for_reset; unsigned int num_bits_resol; const unsigned int *reg_values; + bool exynos_specific; }; struct exynos_dsi { @@ -459,6 +460,7 @@ static const struct exynos_dsi_driver_data exynos3_dsi_driver_data = { .wait_for_reset = 1, .num_bits_resol = 11, .reg_values = reg_values, + .exynos_specific = true, }; static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { @@ -471,6 +473,7 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { .wait_for_reset = 1, .num_bits_resol = 11, .reg_values = reg_values, + .exynos_specific = true, }; static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { @@ -481,6 +484,7 @@ static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { .wait_for_reset = 1, .num_bits_resol = 11, .reg_values = reg_values, + .exynos_specific = true, }; static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { @@ -492,6 +496,7 @@ static const struct exynos_dsi_driver_data exynos5433_dsi_driver_data = { .wait_for_reset = 0, .num_bits_resol = 12, .reg_values = exynos5433_reg_values, + .exynos_specific = true, }; static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { @@ -503,6 +508,7 @@ static const struct exynos_dsi_driver_data exynos5422_dsi_driver_data = { .wait_for_reset = 1, .num_bits_resol = 12, .reg_values = exynos5422_reg_values, + .exynos_specific = true, }; static const struct of_device_id exynos_dsi_of_match[] = { @@ -1484,7 +1490,8 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, * If attached panel device is for command mode one, dsi should register * TE interrupt handler. */ - if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { + if (dsi->driver_data->exynos_specific && + !(device->mode_flags & MIPI_DSI_MODE_VIDEO)) { int ret = exynos_dsi_register_te_irq(dsi, &device->dev); if (ret) return ret; @@ -1495,8 +1502,9 @@ static int exynos_dsi_host_attach(struct mipi_dsi_host *host, dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; - exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = - !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); + if (dsi->driver_data->exynos_specific) + exynos_drm_crtc_get_by_type(drm, EXYNOS_DISPLAY_TYPE_LCD)->i80_mode = + !(dsi->mode_flags & MIPI_DSI_MODE_VIDEO); mutex_unlock(&drm->mode_config.mutex); @@ -1515,7 +1523,8 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, if (drm->mode_config.poll_enabled) drm_kms_helper_hotplug_event(drm); - exynos_dsi_unregister_te_irq(dsi); + if (dsi->driver_data->exynos_specific) + exynos_dsi_unregister_te_irq(dsi); return 0; } @@ -1737,6 +1746,15 @@ static int exynos_dsi_probe(struct platform_device *pdev) if (ret) return ret; + if (!dsi->driver_data->exynos_specific) { + ret = mipi_dsi_host_register(&dsi->dsi_host); + if (ret) { + dev_err(dev, "failed to register mipi dsi host: %d\n", + ret); + return ret; + } + } + platform_set_drvdata(pdev, dsi); pm_runtime_enable(dev); @@ -1747,9 +1765,11 @@ static int exynos_dsi_probe(struct platform_device *pdev) drm_bridge_add(&dsi->bridge); - ret = component_add(dev, &exynos_dsi_component_ops); - if (ret) - goto err_disable_runtime; + if (dsi->driver_data->exynos_specific) { + ret = component_add(dev, &exynos_dsi_component_ops); + if (ret) + goto err_disable_runtime; + } return 0; @@ -1767,7 +1787,8 @@ static int exynos_dsi_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); - component_del(&pdev->dev, &exynos_dsi_component_ops); + if (dsi->driver_data->exynos_specific) + component_del(&pdev->dev, &exynos_dsi_component_ops); return 0; }
Exynos DSI driver is actually a Samsung MIPI DSIM bridge IP which is also used in i.MX8MM platforms. Right now the existing driver has some exynos drm specific code bases like te_irq, crtc and component_ops. In order to switch this driver into a common bridge driver We can see 2 options to handle the exynos specific code. A. Drop the component_ops, and rework other specifics. This may lead to more foundation work as it requires more changes in exynos drm drivers stack. B. Handle the exynos specifics via driver data, and make the common bridge work in different platforms and plan for option A in future. So, this patch is trying to add option B) changes to handle exynos specifics via driver_data. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 37 +++++++++++++++++++------ 1 file changed, 29 insertions(+), 8 deletions(-)