| Message ID | 20210710070206.462875-2-leo.yan@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] coresight: tmc-etr: Correct memory sync ranges in SG mode | expand |
Hi Leo, On 10/07/2021 08:02, Leo Yan wrote: > Current code misses to handle the case for the trace wrapping around, > thus it fails to sync the complete memory ranges in catu mode. > Similar to the tmc-sg, the infrastructure take care of wrapping the page indices to sync the correct memory. Suzuki > This patch corrects the memory sync ranges, when detects the wrapping > around case, it splits into two chunks: one chunk is the tail of the > buffer and another chunk is from the start of the buffer after wrapping > around. > > Signed-off-by: Leo Yan <leo.yan@linaro.org> > --- > drivers/hwtracing/coresight/coresight-catu.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c > index e0740c6dbd54..634af451f0d3 100644 > --- a/drivers/hwtracing/coresight/coresight-catu.c > +++ b/drivers/hwtracing/coresight/coresight-catu.c > @@ -323,7 +323,24 @@ static void catu_sync_etr_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp) > } > > etr_buf->offset = r_offset; > - tmc_sg_table_sync_data_range(catu_table, r_offset, etr_buf->len); > + > + if (r_offset + etr_buf->len > etr_buf->size) { > + int len1, len2; > + > + /* > + * If trace data is wrapped around, sync AUX bounce buffer > + * for two chunks: "len1" is for the trace date length at > + * the tail of bounce buffer, and "len2" is the length from > + * the start of the buffer after wrapping around. > + */ > + len1 = etr_buf->size - r_offset; > + len2 = etr_buf->len - len1; > + tmc_sg_table_sync_data_range(catu_table, r_offset, len1); > + tmc_sg_table_sync_data_range(catu_table, 0, len2); > + } else { > + tmc_sg_table_sync_data_range(catu_table, r_offset, > + etr_buf->len); > + } > } > > static int catu_alloc_etr_buf(struct tmc_drvdata *tmc_drvdata, >
diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index e0740c6dbd54..634af451f0d3 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -323,7 +323,24 @@ static void catu_sync_etr_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp) } etr_buf->offset = r_offset; - tmc_sg_table_sync_data_range(catu_table, r_offset, etr_buf->len); + + if (r_offset + etr_buf->len > etr_buf->size) { + int len1, len2; + + /* + * If trace data is wrapped around, sync AUX bounce buffer + * for two chunks: "len1" is for the trace date length at + * the tail of bounce buffer, and "len2" is the length from + * the start of the buffer after wrapping around. + */ + len1 = etr_buf->size - r_offset; + len2 = etr_buf->len - len1; + tmc_sg_table_sync_data_range(catu_table, r_offset, len1); + tmc_sg_table_sync_data_range(catu_table, 0, len2); + } else { + tmc_sg_table_sync_data_range(catu_table, r_offset, + etr_buf->len); + } } static int catu_alloc_etr_buf(struct tmc_drvdata *tmc_drvdata,
Current code misses to handle the case for the trace wrapping around, thus it fails to sync the complete memory ranges in catu mode. This patch corrects the memory sync ranges, when detects the wrapping around case, it splits into two chunks: one chunk is the tail of the buffer and another chunk is from the start of the buffer after wrapping around. Signed-off-by: Leo Yan <leo.yan@linaro.org> --- drivers/hwtracing/coresight/coresight-catu.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)