From patchwork Sat Jul 10 11:38:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 12368539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DB58C07E95 for ; Sat, 10 Jul 2021 11:43:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BFCB2613BF for ; Sat, 10 Jul 2021 11:43:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BFCB2613BF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=026+VvJFkK+aP4QXHklHZp1Xl9QfbwpxWjlw/jYJMzo=; b=Scu2W7wXsMzr6f IN+Zsq3EdjZK2Cn28NvxhIBnVVC4kenHK5oxOjdkAyFZ9EJcZZRgB/riCD7f0UsBJHbScBQ1Xnu6l DgiFIgFYj3BgrOOZwztjI0ZueJZSII3iN7FO2qrCm2KIN6jFHLvibJsTMCH0EMlBsJ8SQp9Frkm88 Yo42tlvMlqvmjSNHqNsC+dObonejJJhkJR0McnmpseirBr5bmnu13QaZc487d6YAlZr03GzwBrRu8 H5VmCK+yW0mrFv7x5+811AWG3FafPRl0TWITEu/HFOC55bYjxEKB2b1A1r6LrqZtGOZ5TNQuLexte 2nevGupi1+nB2HYcbZMw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m2BL4-003Wmt-5N; Sat, 10 Jul 2021 11:40:06 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m2BJu-003WTu-CO; Sat, 10 Jul 2021 11:38:56 +0000 X-UUID: e28d9be7d861406381f5c5d7bb51a003-20210710 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Ywk2XUemZpsof5IVA5Z2YlJkiTkoGAkOPmXhc8FErCA=; b=DEOtjgP0gG+SuJsA2FRL23a9XCfHPJTyMPfvlWeY2i9SI9/JAptAj8DcHxX7kogzfnCVRCxfY4/+fIZe2RW3bHCgytiQDb2s6hwuMsacNYc64jsqg3ggjEZsnypQIkJjDalywrgXsPopxkmS9CrgWBrx8R39hpEOIQTWoPjEsVs=; X-UUID: e28d9be7d861406381f5c5d7bb51a003-20210710 Received: from mtkcas67.mediatek.inc [(172.29.193.45)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1381712914; Sat, 10 Jul 2021 04:38:44 -0700 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 10 Jul 2021 04:38:42 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 10 Jul 2021 19:38:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 10 Jul 2021 19:38:28 +0800 From: jason-jh.lin To: , CC: , , , , , , , Subject: [PATCH v2 2/9] dt-bindings: mediatek: add DSC definition for mt8195 Date: Sat, 10 Jul 2021 19:38:12 +0800 Message-ID: <20210710113819.5170-3-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210710113819.5170-1-jason-jh.lin@mediatek.com> References: <20210710113819.5170-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210710_043854_588835_9BB06C45 X-CRM114-Status: GOOD ( 11.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add DSC definition file for mt8195 display. Signed-off-by: jason-jh.lin --- .../display/mediatek/mediatek,dsc.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml new file mode 100644 index 000000000000..85ee0d85e77e --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: mediatek DSC Controller Device Tree Bindings + +maintainers: + - CK Hu + - Jitao shi + - Jason-JH Lin + +description: | + The DSC Standard is a specification of the algorithms used for + compressing and decompressing image display streams, including + the specification of the syntax and semantics of the compressed + video bit stream. DSC is designed for real-time systems, with + real-time compression, transmission, decompression, and Display. + +properties: + compatible: + enum: + - mediatek,mt8195-disp-dsc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: DSC Wrapper Clock + + clock-names: + items: + - const: DSC_WRAP0 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + dsc0: disp_dsc_wrap@1c009000 { + compatible = "mediatek,mt8195-disp-dsc"; + reg = <0 0x1c009000 0 0x1000>; + interrupts = ; + clocks = <&vdosys0 CLK_VDO0_DSC_WRAP0>; + }; + +...