@@ -191,7 +191,6 @@ alternative_else_nop_endif
ldr_l \tmp, gcr_kernel_excl
mte_set_gcr \tmp, \tmp2
- isb
1:
#endif
.endm
@@ -265,12 +264,24 @@ alternative_if ARM64_HAS_ADDRESS_AUTH
orr x0, x0, SCTLR_ELx_ENIA
msr sctlr_el1, x0
2:
- isb
alternative_else_nop_endif
#endif
mte_set_kernel_gcr x22, x23
+ /*
+ * Any non-self-synchronizing system register updates required for
+ * kernel entry should be placed before this point.
+ */
+ alternative_if ARM64_MTE
+ isb
+ b 1f
+ alternative_else_nop_endif
+ alternative_if ARM64_HAS_ADDRESS_AUTH
+ isb
+ alternative_else_nop_endif
+1:
+
scs_load tsk, x20
.else
add x21, sp, #PT_REGS_SIZE
Although an ISB is required in order to make the MTE-related system register update to GCR_EL1 effective, and the same is true for PAC-related updates to SCTLR_EL1 or APIAKey{Hi,Lo}_EL1, we issue two ISBs on machines that support both features while we only need to issue one. To avoid the unnecessary additional ISB, remove the ISBs from the PAC and MTE-specific alternative blocks and add a couple of additional blocks that cause us to only execute one ISB if both features are supported. Signed-off-by: Peter Collingbourne <pcc@google.com> Link: https://linux-review.googlesource.com/id/Idee7e8114d5ae5a0b171d06220a0eb4bb015a51c --- arch/arm64/kernel/entry.S | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)