| Message ID | 20210720141642.24999-2-a-govindraju@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | CAN: Add support for CAN in AM65,J721e and AM64 | expand |
On 20.07.2021 19:46:37, Aswath Govindraju wrote: > From: Faiz Abbas <faiz_abbas@ti.com> > > Add Support for two MCAN controllers present on the am65x SOC. Both support > classic CAN messages as well as CAN-FD. Thanks for the patch! Why don't you disable the CAN cores by default in the dtsi? regards, Marc
Hi Marc, On 20/07/21 7:50 pm, Marc Kleine-Budde wrote: > On 20.07.2021 19:46:37, Aswath Govindraju wrote: >> From: Faiz Abbas <faiz_abbas@ti.com> >> >> Add Support for two MCAN controllers present on the am65x SOC. Both support >> classic CAN messages as well as CAN-FD. > > Thanks for the patch! > > Why don't you disable the CAN cores by default in the dtsi? As far as I know, in the dtsi file we mention all the subsystems or periherals present in the SoC and in the specific board dts file we enable or disable the DT nodes depending on whether the pins are brought out. Thanks, Aswath > > regards, > Marc >
On 20:00-20210720, Aswath Govindraju wrote: > Hi Marc, > > On 20/07/21 7:50 pm, Marc Kleine-Budde wrote: > > On 20.07.2021 19:46:37, Aswath Govindraju wrote: > >> From: Faiz Abbas <faiz_abbas@ti.com> > >> > >> Add Support for two MCAN controllers present on the am65x SOC. Both support > >> classic CAN messages as well as CAN-FD. > > > > Thanks for the patch! > > > > Why don't you disable the CAN cores by default in the dtsi? > > As far as I know, in the dtsi file we mention all the subsystems or > periherals present in the SoC and in the specific board dts file we > enable or disable the DT nodes depending on whether the pins are > brought out. There is a long history on this. You should be able to look the discussion up in lore archives. The nutshell is the dtsi files should maintain DT standard which is "default, status if not explicitly provided is enabled" and the board dts files will explicitly disable OR reserve the nodes that are not pinned out / used / reserved (due to firmware usage) etc. There is the entire string parsing, size arguments that run around this topic, but, anyways.
On 20.07.2021 20:00:32, Aswath Govindraju wrote: > Hi Marc, > > On 20/07/21 7:50 pm, Marc Kleine-Budde wrote: > > On 20.07.2021 19:46:37, Aswath Govindraju wrote: > >> From: Faiz Abbas <faiz_abbas@ti.com> > >> > >> Add Support for two MCAN controllers present on the am65x SOC. Both support > >> classic CAN messages as well as CAN-FD. > > > > Thanks for the patch! > > > > Why don't you disable the CAN cores by default in the dtsi? > > As far as I know, in the dtsi file we mention all the subsystems or > periherals present in the SoC and in the specific board dts file we > enable or disable the DT nodes depending on whether the pins are > brought out. If you disable the subsystems (that need pins) by default, you only have to list and configure only the used subsystems and not disable the unused ones. But it seems in the TI land you're following the rule you outlined above, so go ahead. Marc
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index c93ff1520a0e..f8fff0a5b127 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -159,6 +159,36 @@ }; }; + m_can0: mcan@40528000 { + compatible = "bosch,m_can"; + reg = <0x0 0x40528000 0x0 0x400>, + <0x0 0x40500000 0x0 0x4400>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 102 0>, <&k3_clks 102 5>; + clock-names = "cclk", "hclk"; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + }; + + m_can1: mcan@40568000 { + compatible = "bosch,m_can"; + reg = <0x0 0x40568000 0x0 0x400>, + <0x0 0x40540000 0x0 0x4400>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 103 0>, <&k3_clks 103 5>; + clock-names = "cclk", "hclk"; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + }; + fss: fss@47000000 { compatible = "simple-bus"; #address-cells = <2>;