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Fri, 23 Jul 2021 15:28:15 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DBC35100039; Fri, 23 Jul 2021 15:28:14 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C85F2221783; Fri, 23 Jul 2021 15:28:14 +0200 (CEST) Received: from localhost (10.75.127.47) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 23 Jul 2021 15:28:14 +0200 From: Alexandre Torgue To: Linus Walleij , , Olof Johansson , , Russell King , Jonathan Corbet CC: , , , , , Maxime Coquelin , Alexandre Torgue Subject: [PATCH 3/7] docs: arm: stm32: introduce STM32MP13 SoCs Date: Fri, 23 Jul 2021 15:28:06 +0200 Message-ID: <20210723132810.25728-4-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210723132810.25728-1-alexandre.torgue@foss.st.com> References: <20210723132810.25728-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-23_05:2021-07-23, 2021-07-23 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210723_062829_244891_8AABD272 X-CRM114-Status: GOOD ( 14.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org STM32MP13 SoCs are derivative of STM32MP15 SoCs. They embed one Cortex-A7 plus standard connectivity. Signed-off-by: Alexandre Torgue diff --git a/Documentation/arm/index.rst b/Documentation/arm/index.rst index d4f34ae9e6f4..2bda5461a80b 100644 --- a/Documentation/arm/index.rst +++ b/Documentation/arm/index.rst @@ -55,6 +55,7 @@ SoC-specific documents stm32/stm32h750-overview stm32/stm32f769-overview stm32/stm32f429-overview + stm32/stm32mp13-overview stm32/stm32mp157-overview sunxi diff --git a/Documentation/arm/stm32/stm32mp13-overview.rst b/Documentation/arm/stm32/stm32mp13-overview.rst new file mode 100644 index 000000000000..3bb9492dad49 --- /dev/null +++ b/Documentation/arm/stm32/stm32mp13-overview.rst @@ -0,0 +1,37 @@ +=================== +STM32MP13 Overview +=================== + +Introduction +------------ + +The STM32MP131/STM32MP133/STM32MP135 are Cortex-A MPU aimed at various applications. +They feature: + +- One Cortex-A7 application core +- Standard memories interface support +- Standard connectivity, widely inherited from the STM32 MCU family +- Comprehensive security support + +More details: + +- Cortex-A7 core running up to @900MHz +- FMC controller to connect SDRAM, NOR and NAND memories +- QSPI +- SD/MMC/SDIO support +- 2*Ethernet controller +- CAN +- ADC/DAC +- USB EHCI/OHCI controllers +- USB OTG +- I2C, SPI, CAN busses support +- Several general purpose timers +- Serial Audio interface +- LCD controller +- DCMIPP +- SPDIFRX +- DFSDM + +:Authors: + +- Alexandre Torgue