From patchwork Tue Jul 27 04:52:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12401831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E56CC4338F for ; Tue, 27 Jul 2021 06:25:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 43CAA610D2 for ; Tue, 27 Jul 2021 06:25:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 43CAA610D2 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vCFeombt/ekBLQwAPoR2OxgUsJgA+K7GIxoBveEqbAw=; b=v70grz7jMB8hcg 1AozgaHuOqS5OddW9ZMHCuw8GDJD8PGLdqD4cZH1zFjZ7+u9nf6lhfNFHd5nplE85rU0ZZfvu+UAT wx9uwG3J3iM2LNH3OQnWcTCJd30tV261D/cEXpXo+sZK4AmvpatI3UKiJ5S0///44xs/hIgMLIVBl QTjcfYGfWeNGp2/Qwy8GNCjh31E4qostCXB7Qy1X1QihNnfAy0MCFWgRgCRERSzr1g1og0xW6Nc2p PZef2F5l5s3GmAU/YFlV4g/5f+qm1JH167iK5MabwyeJUB0kSMD8yHmScjyZRohGdLkPuFu6ZUXyX rg/iOKfpEikSCm5SjZqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m8GTr-00DbaZ-Pc; Tue, 27 Jul 2021 06:22:21 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m8F6v-00DHth-QK; Tue, 27 Jul 2021 04:54:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1627361674; x=1658897674; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=L804f2SQT/kD0Qvc6v7SllFOYiMRzMP0mOA6jLCywcU=; b=NKtLOMewCeMm0xzuxJuKgU97huHiB1A5ASHXT6vOAm8z+hoQRDqxsETk g+oztjn+jaCZRL2tD3bssTxIkMZab3kO0RXricvUH6HAnUqM1FM71B5VB vrxx6Q25Vflv/jCPvsj103vYUZOczIeGwZLVxKqp7mL71njMY0URM7TUY coTrrp9YxME1QgefyWKJWiBr9osIAES8HGCaGrFG4pu7PzkyX4MOQPO6g M4SgeV/4SboXVixfRJLtLhf/Q/l9s+rCZEiwszYHocs9eOQiq2alBR5BA +179PdU1GKXGFjA3uBZYVwoi6ZEgxyxZ/B+ChQqi0GKtEe0nPNjhJFw94 w==; IronPort-SDR: BPCUfJkl4AbaN1aBkWL1mZent3s79Ri/lrhqherdkcQEHCWmXrevf6S5RUHZqDxbIKds0EG/ZH VnzkINf4hnaPoDMka33S7H8qkjOmUZn9DirvE9SRDgMHjhLfTgZrhRq0Q6wQPLSv697B35bqqm aGnnyX2U/9N459IGWIMzwbo5P+IDUdXNlb0dCFLIrxhWaYTr/HsbNd+RkImk/1ER8jZY0KK6YD 7nMX/9tMJ7vWTBJ5wvbrwCXcuQKcuD0N9CzoLDEBrW44o+f5lSm2Jm0jxQoRTSEHLAnigikAWc mm1ZB50W24zAwSR6j44m3nic X-IronPort-AV: E=Sophos;i="5.84,272,1620716400"; d="scan'208";a="129935509" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 26 Jul 2021 21:54:32 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 26 Jul 2021 21:54:31 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 26 Jul 2021 21:54:26 -0700 From: Tudor Ambarus To: , , Subject: [PATCH v2 24/35] mtd: spi-nor: core: Fix spi_nor_flash_parameter otp description Date: Tue, 27 Jul 2021 07:52:11 +0300 Message-ID: <20210727045222.905056-25-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210727045222.905056-1-tudor.ambarus@microchip.com> References: <20210727045222.905056-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210726_215433_927014_D2775BC6 X-CRM114-Status: UNSURE ( 9.16 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw, Tudor Ambarus , richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk, knaerzche@gmail.com, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch, miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de, figgyc@figgyc.uk, mail@david-bauer.net, zhengxunli@mxic.com.tw Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the description of the otp member of the struct spi_nor_flash_parameter. Signed-off-by: Tudor Ambarus Reviewed-by: Pratyush Yadav Reviewed-by: Michael Walle --- drivers/mtd/spi-nor/core.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 7fb0cfabe85a..501d9212ba9b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -250,7 +250,7 @@ struct spi_nor_otp { * higher index in the array, the higher priority. * @erase_map: the erase map parsed from the SFDP Sector Map Parameter * Table. - * @otp_info: describes the OTP regions. + * @otp: SPI NOR OTP info. * @octal_dtr_enable: enables SPI NOR octal DTR mode. * @quad_enable: enables SPI NOR quad mode. * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. @@ -262,7 +262,6 @@ struct spi_nor_otp { * e.g. different opcodes, specific address calculation, * page size, etc. * @locking_ops: SPI NOR locking methods. - * @otp: SPI NOR OTP methods. */ struct spi_nor_flash_parameter { u64 size;