From patchwork Fri Jul 30 11:24:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 12411083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48540C4338F for ; Fri, 30 Jul 2021 11:33:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1005861040 for ; Fri, 30 Jul 2021 11:33:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1005861040 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LYA7q0YY6mg4LmX5ZxKDFjVNp0n3bWEQ1YPOkbPM3SQ=; b=3E/ikU+vbvxkq3 IgUl/MOiyuaFRqNXd8yXqyl06YYkcjSQYve/1tZNnrDSFOHybBK5DUIKNWmZdEc7Q0o6Unee5bbr0 Vl4OJv0y/0KLR8OD7APGxNiGtaNC3OsYtkH1oEjb+XCJAkvI1QcVJk55cq8tSSYQbta/p58eEZzS8 2a7dp2GiQSIbAklDFH1DA6jmiAsXHiDjr7V6XBsUKC5On5DI8XNJfYHj+rn9F8ePBmvmEdruW3Dfs vz0eRuHUJAxqXJTHRiw1meFvIahyB7fSg80uTW/yY1q7g7qIi38Pn/FWNEezqEjicoZaLRlqERnPY w2am1HUERmwD1aoONTpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m9QjD-008Jzv-G8; Fri, 30 Jul 2021 11:30:59 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m9Qe8-008HaB-21 for linux-arm-kernel@lists.infradead.org; Fri, 30 Jul 2021 11:25:45 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 3D69761055; Fri, 30 Jul 2021 11:25:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1627644343; bh=VcjaQPzybbGlvtzMZMZPB8b5mPi8TxhDPTMLtmuqXPU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uPJLNBAq9EWh5Ch+oqsURAMrDIMMJZJ0bHbeueS0fIIKjv+VuBdXp9WWHI7r05VSp vNf+qMi0pfqDEm2XlU4JVuXCOMlFs+dj4a3tWWpHqVAnRxGMikDDAU9JLTMYRbtoZZ UEmFwv9nWdLdiDGQvIu1/zG+n3808lISU6eodl+5HgJTwWbOHHRomS1i7f5h+7dLNm asuerZzynWzfMk4HTtUlZ/eQyllQDEyoq1q75WdFinOfmIl9kGTp1XOFm9pp8rp4RV qXdCa3Ni0Yh/iVvc3FIpVjPNcacdGn7EvNV9uVHGuMSYMq9ds/DyR32apaIhgamfYX iojvukfFf37yQ== From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Will Deacon , Catalin Marinas , Marc Zyngier , Greg Kroah-Hartman , Peter Zijlstra , Morten Rasmussen , Qais Yousef , Suren Baghdasaryan , Quentin Perret , Tejun Heo , Johannes Weiner , Ingo Molnar , Juri Lelli , Vincent Guittot , "Rafael J. Wysocki" , Dietmar Eggemann , Daniel Bristot de Oliveira , Valentin Schneider , Mark Rutland , kernel-team@android.com Subject: [PATCH v11 13/16] arm64: Advertise CPUs capable of running 32-bit applications in sysfs Date: Fri, 30 Jul 2021 12:24:40 +0100 Message-Id: <20210730112443.23245-14-will@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210730112443.23245-1-will@kernel.org> References: <20210730112443.23245-1-will@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210730_042544_212582_CAD0F4D1 X-CRM114-Status: GOOD ( 13.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since 32-bit applications will be killed if they are caught trying to execute on a 64-bit-only CPU in a mismatched system, advertise the set of 32-bit capable CPUs to userspace in sysfs. Reviewed-by: Greg Kroah-Hartman Reviewed-by: Catalin Marinas Signed-off-by: Will Deacon --- .../ABI/testing/sysfs-devices-system-cpu | 9 +++++++++ arch/arm64/kernel/cpufeature.c | 19 +++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 160b10c029c0..69edbd99e0b7 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -494,6 +494,15 @@ Description: AArch64 CPU registers 'identification' directory exposes the CPU ID registers for identifying model and revision of the CPU. +What: /sys/devices/system/cpu/aarch32_el0 +Date: May 2021 +Contact: Linux ARM Kernel Mailing list +Description: Identifies the subset of CPUs in the system that can execute + AArch32 (32-bit ARM) applications. If present, the same format as + /sys/devices/system/cpu/{offline,online,possible,present} is used. + If absent, then all or none of the CPUs can execute AArch32 + applications and execve() will behave accordingly. + What: /sys/devices/system/cpu/cpu#/cpu_capacity Date: December 2016 Contact: Linux kernel mailing list diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d99a29f52aa1..7ee1095a4585 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -67,6 +67,7 @@ #include #include #include +#include #include #include #include @@ -1320,6 +1321,24 @@ const struct cpumask *system_32bit_el0_cpumask(void) return cpu_possible_mask; } +static ssize_t aarch32_el0_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + const struct cpumask *mask = system_32bit_el0_cpumask(); + + return sysfs_emit(buf, "%*pbl\n", cpumask_pr_args(mask)); +} +static const DEVICE_ATTR_RO(aarch32_el0); + +static int __init aarch32_el0_sysfs_init(void) +{ + if (!allow_mismatched_32bit_el0) + return 0; + + return device_create_file(cpu_subsys.dev_root, &dev_attr_aarch32_el0); +} +device_initcall(aarch32_el0_sysfs_init); + static bool has_32bit_el0(const struct arm64_cpu_capabilities *entry, int scope) { if (!has_cpuid_feature(entry, scope))