diff mbox series

[v2,5/9] perf cs-etm: Fix typo

Message ID 20210806134109.1182235-6-james.clark@arm.com (mailing list archive)
State New, archived
Headers show
Series Support ETE decoding | expand

Commit Message

James Clark Aug. 6, 2021, 1:41 p.m. UTC
TRCIRD2 should be TRCIDR2

Signed-off-by: James Clark <james.clark@arm.com>
---
 tools/perf/arch/arm/util/cs-etm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Leo Yan Aug. 24, 2021, 7:15 a.m. UTC | #1
On Fri, Aug 06, 2021 at 02:41:05PM +0100, James Clark wrote:
> TRCIRD2 should be TRCIDR2
> 
> Signed-off-by: James Clark <james.clark@arm.com>

Reviewed-by: Leo Yan <leo.yan@linaro.org>

> ---
>  tools/perf/arch/arm/util/cs-etm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
> index e3500b79d972..515aae470e23 100644
> --- a/tools/perf/arch/arm/util/cs-etm.c
> +++ b/tools/perf/arch/arm/util/cs-etm.c
> @@ -75,7 +75,7 @@ static int cs_etm_set_context_id(struct auxtrace_record *itr,
>  	if (!cs_etm_is_etmv4(itr, cpu))
>  		goto out;
>  
> -	/* Get a handle on TRCIRD2 */
> +	/* Get a handle on TRCIDR2 */
>  	snprintf(path, PATH_MAX, "cpu%d/%s",
>  		 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
>  	err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
> -- 
> 2.28.0
>
Suzuki K Poulose Sept. 3, 2021, 9:09 a.m. UTC | #2
On 06/08/2021 14:41, James Clark wrote:
> TRCIRD2 should be TRCIDR2
> 
> Signed-off-by: James Clark <james.clark@arm.com>

Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Mike Leach Sept. 5, 2021, 9:24 p.m. UTC | #3
Reviewed-by: Mike Leach <mike.leach@linaro.org>


On Fri, 3 Sept 2021 at 10:09, Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
>
> On 06/08/2021 14:41, James Clark wrote:
> > TRCIRD2 should be TRCIDR2
> >
> > Signed-off-by: James Clark <james.clark@arm.com>
>
> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>



--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
diff mbox series

Patch

diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
index e3500b79d972..515aae470e23 100644
--- a/tools/perf/arch/arm/util/cs-etm.c
+++ b/tools/perf/arch/arm/util/cs-etm.c
@@ -75,7 +75,7 @@  static int cs_etm_set_context_id(struct auxtrace_record *itr,
 	if (!cs_etm_is_etmv4(itr, cpu))
 		goto out;
 
-	/* Get a handle on TRCIRD2 */
+	/* Get a handle on TRCIDR2 */
 	snprintf(path, PATH_MAX, "cpu%d/%s",
 		 cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
 	err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);