| Message ID | 20210811073835.32082-1-o.rempel@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz | expand |
On Wed, Aug 11, 2021 at 09:38:35AM +0200, Oleksij Rempel wrote: > By default ENET_REF is configured to 50MHz, which is usable for the RMII > link. In case RGMII is used, we need 125MHz clock. > > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Applied, thanks!
diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts index 9cbe3386c51a..effe032273f7 100644 --- a/arch/arm/boot/dts/imx6qp-prtwd3.dts +++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts @@ -256,6 +256,8 @@ can@0 { &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; + assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF>; + assigned-clock-rates = <125000000>; status = "okay"; phy-mode = "rgmii";
By default ENET_REF is configured to 50MHz, which is usable for the RMII link. In case RGMII is used, we need 125MHz clock. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> --- arch/arm/boot/dts/imx6qp-prtwd3.dts | 2 ++ 1 file changed, 2 insertions(+)