| Message ID | 20210817163420.813631-1-alexandru.elisei@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [boot-wrapper] aarch64: Do not trap PMSNEVFR_EL1 | expand |
On Tue, Aug 17, 2021 at 05:34:20PM +0100, Alexandru Elisei wrote: > FEAT_PMUv1p2 adds a new register, PMSNEVFR_EL1, and a new MDCR_EL3 trap bit > for it, EnPMSN. Set the bit to 1 to allow lower exception levels direct > access to the register. > > Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Thanks for this; I have a couple of minor comments below, which I'll fix up when applying. > --- > arch/aarch64/boot.S | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S > index 2215f7ed3a1f..8951f1e4676a 100644 > --- a/arch/aarch64/boot.S > +++ b/arch/aarch64/boot.S > @@ -88,8 +88,12 @@ ASM_FUNC(_start) > cbz x1, 1f > > // Enable SPE for the non-secure world. > - ldr x1, =(0x3 << 12) > - orr x0, x0, x1 > + ldr x2, =(0x3 << 12) > + orr x0, x0, x2 Since we're touching this, I'll make it: orr x0, x0, #(3 << 12) > + cmp x1, #3 > + b.lt 1 For consistency, I'll make this `b.lt 1f` > + // Do not trap PMSNEVFR_EL1. > + orr x0, x0, #(1 << 36) For legibility, I'll re-order this as: // Do not trap PMSNEVFR_EL1 if present. cmp x1, #3 b.lt 1f orr x0, x0, #(1 << 36) Thanks, Mark. > > 1: mrs x1, id_aa64dfr0_el1 > ubfx x1, x1, #44, #4 > -- > 2.32.0 >
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index 2215f7ed3a1f..8951f1e4676a 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -88,8 +88,12 @@ ASM_FUNC(_start) cbz x1, 1f // Enable SPE for the non-secure world. - ldr x1, =(0x3 << 12) - orr x0, x0, x1 + ldr x2, =(0x3 << 12) + orr x0, x0, x2 + cmp x1, #3 + b.lt 1 + // Do not trap PMSNEVFR_EL1. + orr x0, x0, #(1 << 36) 1: mrs x1, id_aa64dfr0_el1 ubfx x1, x1, #44, #4
FEAT_PMUv1p2 adds a new register, PMSNEVFR_EL1, and a new MDCR_EL3 trap bit for it, EnPMSN. Set the bit to 1 to allow lower exception levels direct access to the register. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- arch/aarch64/boot.S | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)