From patchwork Tue Aug 24 09:12:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Billy Tsai X-Patchwork-Id: 12456269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94EC3C4338F for ; Wed, 25 Aug 2021 02:57:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 544AD61220 for ; Wed, 25 Aug 2021 02:57:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 544AD61220 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:Subject:CC:To:From:Message-Id:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=21DHs2hpHl35CLtxI61rkBcSPT3mXbZw8REAuuCmVVc=; b=hAJGrrEI+yyRwb j4bwIKIRBspr4bAU8chF49dirM+g9/hq1kgnmbL4JwAlb9ZgXFfBjZvcERKcAV8oRO6nvyMTu++oT SkIebLNC2I0CE7h3+lvTTFM/sN5QPpi+fySOS8GCGegpEq1L3EefgUVbwd4262k1Nw+VvY+/HJ51+ ZBPykYzk1YiohK2i2KOKp26VXXCRZ9rWqT/IUGXsvBzqCzTvlsRNpcGfgX+NBxAadPRvvOSBfUArt EV3YKB7JNFKzHILpAtkaGKpLx4HwgWicBBoDgfuTg9p+BkRyU5pNCjrI4Ssc+mTyYxsubrrnXeUZc JrULnR3X0vd1P1rbAqwg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mIj4I-005HHo-SI; Wed, 25 Aug 2021 02:55:11 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mIj4G-005HHD-7L for linux-arm-kernel@bombadil.infradead.org; Wed, 25 Aug 2021 02:55:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:Content-Transfer-Encoding :MIME-Version:References:In-Reply-To:Date:Subject:CC:To:From:Message-Id: Sender:Reply-To:Content-ID:Content-Description; bh=cnbobVgH3jdOOUdgQCAXb2hEqQZdmgCQSkrdrXUF944=; b=Mnb65Ik2yqhZ18D/qN/pSAgzVk maPXfnRkMIXdQ+CBYAFSr2HNmTvoVqDrIJNfnqofRsMosKaeagPhlJS9FnsJ5a8FU3u/s0M0oVQA/ DHAlmo2f+Iaj5tZo8JWyYASnx8cLSIlmj7Ggj05ONq7GDdW9W/KYGMGDFGXe6ocEnUCjc1GS740Uk xPQXp0PWGvwO7swSov+bJKty+q/YpkJyiBQGgvA945kYvdL0oN39NC2slHtpZ8MGF7eABh69c+5/I wR3FK5XPwb0GFon2YEmbRkOIMdEvHKo0uoIp7T9McoMoJwp+ykmKHghWNL6j3aEmGOn3Xra7tKk+S CNypFVdg==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mIgit-00Ck3y-ON for linux-arm-kernel@lists.infradead.org; Wed, 25 Aug 2021 00:24:58 +0000 Received: (from root@localhost) by twspam01.aspeedtech.com id 17P06E93096992 for ; Wed, 25 Aug 2021 08:06:14 +0800 (GMT-8) (envelope-from billy_tsai@aspeedtech.com) Message-Id: <202108250006.17P06E93096992@twspam01.aspeedtech.com> Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 17O8rHlF098404; Tue, 24 Aug 2021 16:53:17 +0800 (GMT-8) (envelope-from billy_tsai@aspeedtech.com) Received: from BillyTsai-pc.aspeed.com (192.168.2.149) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 24 Aug 2021 17:11:49 +0800 From: Billy Tsai To: , , , , , , , , , , , , , CC: Subject: [RESEND v4 13/15] iio: adc: aspeed: Add compensation phase. Date: Tue, 24 Aug 2021 17:12:41 +0800 X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210824091243.9393-1-billy_tsai@aspeedtech.com> References: <20210824091243.9393-1-billy_tsai@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.149] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 17P06E93096992 X-MSS: FORWARD@twspam01.aspeedtech.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210825_012456_355813_88EC2056 X-CRM114-Status: GOOD ( 18.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds a compensation phase to improve the accurate of ADC measurement. This is the built-in function though input half of the reference voltage to get the ADC offset. Signed-off-by: Billy Tsai --- drivers/iio/adc/aspeed_adc.c | 54 +++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index 4d979dd7fe88..20caf28dff18 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -95,6 +95,7 @@ struct aspeed_adc_data { struct reset_control *rst; int vref; u32 sample_period_ns; + int cv; }; #define ASPEED_CHAN(_idx, _data_reg_addr) { \ @@ -104,7 +105,8 @@ struct aspeed_adc_data { .address = (_data_reg_addr), \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ - BIT(IIO_CHAN_INFO_SAMP_FREQ), \ + BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ + BIT(IIO_CHAN_INFO_OFFSET), \ } static const struct iio_chan_spec aspeed_adc_iio_channels[] = { @@ -126,6 +128,51 @@ static const struct iio_chan_spec aspeed_adc_iio_channels[] = { ASPEED_CHAN(15, 0x2E), }; +static int aspeed_adc_compensation(struct iio_dev *indio_dev) +{ + struct aspeed_adc_data *data = iio_priv(indio_dev); + u32 index, adc_raw = 0; + u32 adc_engine_control_reg_val; + + adc_engine_control_reg_val = + readl(data->base + ASPEED_REG_ENGINE_CONTROL); + adc_engine_control_reg_val &= ~ASPEED_ADC_OP_MODE; + adc_engine_control_reg_val |= + (FIELD_PREP(ASPEED_ADC_OP_MODE, ASPEED_ADC_OP_MODE_NORMAL) | + ASPEED_ADC_ENGINE_ENABLE); + /* + * Enable compensating sensing: + * After that, the input voltage of ADC will force to half of the reference + * voltage. So the expected reading raw data will become half of the max + * value. We can get compensating value = 0x200 - ADC read raw value. + * It is recommended to average at least 10 samples to get a final CV. + */ + writel(adc_engine_control_reg_val | ASPEED_ADC_CTRL_COMPENSATION | + ASPEED_ADC_CTRL_CHANNEL_ENABLE(0), + data->base + ASPEED_REG_ENGINE_CONTROL); + /* + * After enable compensating sensing mode need to wait some time for ADC stable + * Experiment result is 1ms. + */ + mdelay(1); + + for (index = 0; index < 16; index++) { + /* + * Waiting for the sampling period ensures that the value acquired + * is fresh each time. + */ + ndelay(data->sample_period_ns); + adc_raw += readw(data->base + aspeed_adc_iio_channels[0].address); + } + adc_raw >>= 4; + data->cv = BIT(ASPEED_RESOLUTION_BITS - 1) - adc_raw; + writel(adc_engine_control_reg_val, + data->base + ASPEED_REG_ENGINE_CONTROL); + dev_dbg(data->dev, "Compensating value = %d\n", data->cv); + + return 0; +} + static int aspeed_adc_set_sampling_rate(struct iio_dev *indio_dev, u32 rate) { struct aspeed_adc_data *data = iio_priv(indio_dev); @@ -155,6 +202,10 @@ static int aspeed_adc_read_raw(struct iio_dev *indio_dev, *val = readw(data->base + chan->address); return IIO_VAL_INT; + case IIO_CHAN_INFO_OFFSET: + *val = data->cv; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: *val = data->vref; *val2 = ASPEED_RESOLUTION_BITS; @@ -444,6 +495,7 @@ static int aspeed_adc_probe(struct platform_device *pdev) return ret; } + aspeed_adc_compensation(indio_dev); /* Start all channels in normal mode. */ adc_engine_control_reg_val = readl(data->base + ASPEED_REG_ENGINE_CONTROL);