From patchwork Wed Aug 25 16:17:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Elisei X-Patchwork-Id: 12458313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24370C4338F for ; Wed, 25 Aug 2021 16:34:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E720661183 for ; Wed, 25 Aug 2021 16:34:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E720661183 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PqIVqIb7ICwBY81rnBp+AQNSzoykdTNUhPFRoZJl4/8=; b=vERiRnLENczySU evGkHa8jrrBiEfNQscMNDhK9ngebzy5mZVNyI+vP23UcKKmmudUcWnLauAGREyGkW+mMS1F0tPZWv H+F4gSPEVGTMS+59650L3TvYrcrT0P4val3IVB3TfIxj9pOQNKfSL2ECSYagMkUwlt511mseOwa0J RvAtwWyqnjrdg3LzbozFXloIdSVaWzrMJlPs83PybzIUhwtfOirO+4U3vg5JxFr/TzcOnzOaua1J+ dctIaEEPQKe/bl/oHT1KkY+JsQjG7pAUC5PBP28SIGWuuh0kqVZPZgS1e6Y/ovG2zqKUDl6qnMmhj 2+CJ5Wg4PdtQnXArYMIg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mIvpY-007o0U-Hj; Wed, 25 Aug 2021 16:32:48 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mIvb2-007gdi-Ph for linux-arm-kernel@lists.infradead.org; Wed, 25 Aug 2021 16:17:50 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DFB02D6E; Wed, 25 Aug 2021 09:17:47 -0700 (PDT) Received: from monolith.cable.virginm.net (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E5B93F66F; Wed, 25 Aug 2021 09:17:46 -0700 (PDT) From: Alexandru Elisei To: maz@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, will@kernel.org, linux-kernel@vger.kernel.org Cc: Sudeep Holla Subject: [RFC PATCH v4 22/39] KVM: arm64: Add SPE VCPU device attribute to initialize SPE Date: Wed, 25 Aug 2021 17:17:58 +0100 Message-Id: <20210825161815.266051-23-alexandru.elisei@arm.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210825161815.266051-1-alexandru.elisei@arm.com> References: <20210825161815.266051-1-alexandru.elisei@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210825_091748_976188_7F3F314A X-CRM114-Status: GOOD ( 19.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Sudeep Holla Add KVM_ARM_VCPU_SPE_CTRL(KVM_ARM_VCPU_SPE_INIT) VCPU ioctl to initialize SPE. Initialization can only be done once for a VCPU. If the feature bit is set, then SPE must be initialized before the VCPU can be run. [ Alexandru E: Split from "KVM: arm64: Add a new VCPU device control group for SPE" ] Signed-off-by: Sudeep Holla Signed-off-by: Alexandru Elisei --- Documentation/virt/kvm/devices/vcpu.rst | 16 ++++++++++++++ arch/arm64/include/asm/kvm_spe.h | 4 ++-- arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/arm.c | 7 ++++-- arch/arm64/kvm/spe.c | 29 ++++++++++++++++++++++++- 5 files changed, 52 insertions(+), 5 deletions(-) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 05821d40849f..c275c320e500 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -185,3 +185,19 @@ Returns: Specifies the Profiling Buffer management interrupt number. The interrupt number must be a PPI and the interrupt number must be the same for each VCPU. SPE emulation requires an in-kernel vGIC implementation. + +4.2 ATTRIBUTE: KVM_ARM_VCPU_SPE_INIT +----------------------------------- + +:Parameters: no additional parameter in kvm_device_attr.addr + +Returns: + + ======= ============================================ + -EBUSY SPE already initialized for this VCPU + -ENXIO SPE not supported or not properly configured + ======= ============================================ + +Request initialization of the Statistical Profiling Extension for this VCPU. +Must be done after initializaing the in-kernel irqchip and after setting the +Profiling Buffer management interrupt number for the VCPU. diff --git a/arch/arm64/include/asm/kvm_spe.h b/arch/arm64/include/asm/kvm_spe.h index 2fe11868719d..2217b821ab37 100644 --- a/arch/arm64/include/asm/kvm_spe.h +++ b/arch/arm64/include/asm/kvm_spe.h @@ -23,7 +23,7 @@ struct kvm_vcpu_spe { void kvm_spe_init_supported_cpus(void); void kvm_spe_vm_init(struct kvm *kvm); -int kvm_spe_check_supported_cpus(struct kvm_vcpu *vcpu); +int kvm_spe_vcpu_first_run_init(struct kvm_vcpu *vcpu); int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); int kvm_spe_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); @@ -36,7 +36,7 @@ struct kvm_vcpu_spe { static inline void kvm_spe_init_supported_cpus(void) {} static inline void kvm_spe_vm_init(struct kvm *kvm) {} -static inline int kvm_spe_check_supported_cpus(struct kvm_vcpu *vcpu) { return -ENOEXEC; } +static inline int kvm_spe_vcpu_first_run_init(struct kvm_vcpu *vcpu) { return -ENOEXEC; } static inline int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index c55d94a1a8f5..d4c0b53a5fb2 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -370,6 +370,7 @@ struct kvm_arm_copy_mte_tags { #define KVM_ARM_VCPU_PVTIME_IPA 0 #define KVM_ARM_VCPU_SPE_CTRL 3 #define KVM_ARM_VCPU_SPE_IRQ 0 +#define KVM_ARM_VCPU_SPE_INIT 1 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 8f7025f2e4a0..6af7ef26d2c1 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -633,8 +633,11 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) if (!kvm_arm_vcpu_is_finalized(vcpu)) return -EPERM; - if (kvm_vcpu_has_spe(vcpu) && kvm_spe_check_supported_cpus(vcpu)) - return -EPERM; + if (kvm_vcpu_has_spe(vcpu)) { + ret = kvm_spe_vcpu_first_run_init(vcpu); + if (ret) + return ret; + } vcpu->arch.has_run_once = true; diff --git a/arch/arm64/kvm/spe.c b/arch/arm64/kvm/spe.c index 2fdb42e27675..801ceb66a3d0 100644 --- a/arch/arm64/kvm/spe.c +++ b/arch/arm64/kvm/spe.c @@ -31,7 +31,7 @@ void kvm_spe_vm_init(struct kvm *kvm) kvm_spe_init_supported_cpus(); } -int kvm_spe_check_supported_cpus(struct kvm_vcpu *vcpu) +static int kvm_spe_check_supported_cpus(struct kvm_vcpu *vcpu) { /* SPE is supported on all CPUs, we don't care about the VCPU mask */ if (cpumask_equal(supported_cpus, cpu_possible_mask)) @@ -43,6 +43,20 @@ int kvm_spe_check_supported_cpus(struct kvm_vcpu *vcpu) return 0; } +int kvm_spe_vcpu_first_run_init(struct kvm_vcpu *vcpu) +{ + int ret; + + ret = kvm_spe_check_supported_cpus(vcpu); + if (ret) + return ret; + + if (!vcpu->arch.spe.initialized) + return -EPERM; + + return 0; +} + static bool kvm_vcpu_supports_spe(struct kvm_vcpu *vcpu) { if (!kvm_supports_spe()) @@ -102,6 +116,18 @@ int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) vcpu->arch.spe.irq_num = irq; return 0; } + case KVM_ARM_VCPU_SPE_INIT: + if (!vcpu->arch.spe.irq_num) + return -ENXIO; + + if (!vgic_initialized(vcpu->kvm)) + return -ENXIO; + + if (kvm_vgic_set_owner(vcpu, vcpu->arch.spe.irq_num, &vcpu->arch.spe)) + return -ENXIO; + + vcpu->arch.spe.initialized = true; + return 0; } return -ENXIO; @@ -138,6 +164,7 @@ int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) switch(attr->attr) { case KVM_ARM_VCPU_SPE_IRQ: + case KVM_ARM_VCPU_SPE_INIT: return 0; }