diff mbox series

[v3,1/2] arm64: add an MTE support check to the top of mte_thread_switch()

Message ID 20210915190336.398390-1-pcc@google.com (mailing list archive)
State New, archived
Headers show
Series [v3,1/2] arm64: add an MTE support check to the top of mte_thread_switch() | expand

Commit Message

Peter Collingbourne Sept. 15, 2021, 7:03 p.m. UTC
This lets us avoid doing unnecessary work on hardware that does
not support MTE, and will allow us to freely use MTE instructions
in the code called by mte_thread_switch().

Since this would mean that we do a redundant check in
mte_check_tfsr_el1(), remove it and add two checks now required in
its callers.

Signed-off-by: Peter Collingbourne <pcc@google.com>
Link: https://linux-review.googlesource.com/id/I02fd000d1ef2c86c7d2952a7f099b254ec227a5d
---
v3:
- remove check from mte_check_tfsr_el1()

 arch/arm64/include/asm/mte.h |  6 ++++++
 arch/arm64/kernel/mte.c      | 10 ++++------
 2 files changed, 10 insertions(+), 6 deletions(-)

Comments

Catalin Marinas Sept. 21, 2021, 12:45 p.m. UTC | #1
On Wed, 15 Sep 2021 12:03:35 -0700, Peter Collingbourne wrote:
> This lets us avoid doing unnecessary work on hardware that does
> not support MTE, and will allow us to freely use MTE instructions
> in the code called by mte_thread_switch().
> 
> Since this would mean that we do a redundant check in
> mte_check_tfsr_el1(), remove it and add two checks now required in
> its callers.

I applied the first patch to arm64 (for-next/fixes), it should appear in
5.15-rc3. It looks to me more like a performance regression with the
additional dsb+isb on the syscall path for hw not supporting MTE (and I
added a Fixes tag). I'll leave the second patch to Will for 5.16.

Thanks!

[1/2] arm64: add an MTE support check to the top of mte_thread_switch()
      https://git.kernel.org/arm64/c/8c8a3b5bd960
diff mbox series

Patch

diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h
index 3f93b9e0b339..02511650cffe 100644
--- a/arch/arm64/include/asm/mte.h
+++ b/arch/arm64/include/asm/mte.h
@@ -99,11 +99,17 @@  void mte_check_tfsr_el1(void);
 
 static inline void mte_check_tfsr_entry(void)
 {
+	if (!system_supports_mte())
+		return;
+
 	mte_check_tfsr_el1();
 }
 
 static inline void mte_check_tfsr_exit(void)
 {
+	if (!system_supports_mte())
+		return;
+
 	/*
 	 * The asynchronous faults are sync'ed automatically with
 	 * TFSR_EL1 on kernel entry but for exit an explicit dsb()
diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
index 9d314a3bad3b..e5e801bc5312 100644
--- a/arch/arm64/kernel/mte.c
+++ b/arch/arm64/kernel/mte.c
@@ -142,12 +142,7 @@  void mte_enable_kernel_async(void)
 #ifdef CONFIG_KASAN_HW_TAGS
 void mte_check_tfsr_el1(void)
 {
-	u64 tfsr_el1;
-
-	if (!system_supports_mte())
-		return;
-
-	tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1);
+	u64 tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1);
 
 	if (unlikely(tfsr_el1 & SYS_TFSR_EL1_TF1)) {
 		/*
@@ -199,6 +194,9 @@  void mte_thread_init_user(void)
 
 void mte_thread_switch(struct task_struct *next)
 {
+	if (!system_supports_mte())
+		return;
+
 	mte_update_sctlr_user(next);
 
 	/*