Message ID | 20210929115409.21254-7-zev@bewilderbeest.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Dynamic aspeed-smc flash chips via "reserved" DT status | expand |
diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts index 9b4cf5ebe6d5..456f4de53869 100644 --- a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts +++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts @@ -68,6 +68,22 @@ flash@0 { }; }; +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + flash@0 { + /* + * The BIOS SPI flash is shared with the host via an + * external mux, and is not accessible by the BMC by + * default (hence "reserved" rather than "okay"). + */ + status = "reserved"; + label = "bios"; + m25p,fast-read; + }; +}; + &uart5 { status = "okay"; };
Signed-off-by: Zev Weiss <zev@bewilderbeest.net> --- .../arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)