From patchwork Tue Oct 5 15:16:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 12537049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9285C433F5 for ; Tue, 5 Oct 2021 15:15:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B57D361108 for ; Tue, 5 Oct 2021 15:15:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B57D361108 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=aKXjoa7dlp1v5QvwF6dc/riPBD/x+66+98jlzEOcQJ0=; b=jyA9ppqXlt7JOX qOQW2RqANw0mrW9S56iC1STYbt49vgb+QGlaOhyY0wwYIh7oCU6OaMzcyLNG0aoey7QPlavSuWUsa lTHWyfzc+CTBm4UlWmcGCt0fcFiWUz3nKiA8Vm4W6GcszRfsrAOrpq8AQDeCZ8XTDIyzMvLJqtWG8 LH/oRQQ8nNxQYyS9xt42oANE5E86UqfHepnauFRdMYRmQrOIWi1GJPkGi2RVZ0I5SfUsUnfSAGlk+ P3lNanL2c619vc1ft4hrOZkBtuMxzgQfTh8VuuObR0FbzIcbFs0egMKRnKzw4/U17a1fnGLPGkvN/ vnO+pi3gKR9FPWKQHjqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXm8H-00B0nv-V0; Tue, 05 Oct 2021 15:13:30 +0000 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXm6x-00AzyR-RV for linux-arm-kernel@lists.infradead.org; Tue, 05 Oct 2021 15:12:09 +0000 Received: by mail-pl1-x633.google.com with SMTP id c4so2527065pls.6 for ; Tue, 05 Oct 2021 08:12:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U5xnEbhfhj61beE3+fA67pEiROAPJXxy08V2QR5u2+Q=; b=i2UkZprCgUbxgED+mE9NNYlCrsOyFziGRNBYfDlIkee5aZlyUOAzVHjHeKsIKJ3bEL Io+MEfw2L6035YBZam/xnZ9C9xPAtOP4rwJks3eS5Y550WNr2rRPCxyI8tPFA5ByfAS5 sUTzLncoYGG4teG7SZiHt2+cjDhys8pI7AO/A2BxZqqUHCKYww14j+kC0umGH3nPxAvX ZZ0O0bjrZrAkaBzGU3ieFywKdzm04hlp7t9t1AYZLUQhqvKB8xL0R/CofaqaENwVEA4w jxLVcwSP7el4twryc9ZIbr9W5GEcjsk18PHehx0Ytp2vWvVSPFB5kkvVv54EAuYBVz1+ cGlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U5xnEbhfhj61beE3+fA67pEiROAPJXxy08V2QR5u2+Q=; b=OnPfcGNTZRUM2ruVn8BF6Hv6L3Nqp/4Cm3fhmOR6Ep5evTnc3TggqWcCL9vBAXlLfZ taa29loQh5zxSVfAB56synZ4NGg1j/xxbr+2gvd9hnuKO8hjcYKGpf8OGVeM6PNklJFl x3+DMzb8WOvNyy9CL20N7bWezbhhg1kSknksPfEanIPKajjl79/mdGat3HsogScSeLTJ vFabEOTW3c4AwFr3L3BEJibqQxPOX3144Jny86I3YZGx3+z9HdKwqi/tkJNvRnCc9myT Er9Qwx0zZ9NNQvZMWAWjynifG+e8UozHT/hfm5Y6dG5wmyzMg3nE52YtmBKBFaP/2jTx VUyw== X-Gm-Message-State: AOAM531J5i5oIMOh+mNAaGUSw26nMqUaEh45jkD6vBIotj2eiL91AmJT 7yqmIrrncHD731SLOe5UNik= X-Google-Smtp-Source: ABdhPJysc5AIcVDOyoSIyIXBuk8VJrPrZ2y4PLlsoKfQxxwLyv+cdhwrCz9VK6Juinqd1t9fPoW73A== X-Received: by 2002:a17:902:ab93:b0:13d:e3b5:7ec2 with SMTP id f19-20020a170902ab9300b0013de3b57ec2mr5698488plr.26.1633446726696; Tue, 05 Oct 2021 08:12:06 -0700 (PDT) Received: from localhost (c-73-25-156-94.hsd1.or.comcast.net. [73.25.156.94]) by smtp.gmail.com with ESMTPSA id m22sm18666113pfo.176.2021.10.05.08.12.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 08:12:05 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-kernel@lists.infradead.org, freedreno@lists.freedesktop.org, Jordan Crouse , Robin Murphy , Will Deacon , Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Sai Prakash Ranjan , Jonathan Marek , =?utf-8?q?Christian_K=C3=B6nig?= , Yangtao Li , Sharat Masetty , Konrad Dybcio , Akhil P Oommen , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 3/3] drm/msm: Extend gpu devcore dumps with pgtbl info Date: Tue, 5 Oct 2021 08:16:27 -0700 Message-Id: <20211005151633.1738878-4-robdclark@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211005151633.1738878-1-robdclark@gmail.com> References: <20211005151633.1738878-1-robdclark@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211005_081207_948958_9AADF335 X-CRM114-Status: GOOD ( 19.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Rob Clark In the case of iova fault triggered devcore dumps, include additional debug information based on what we think is the current page tables, including the TTBR0 value (which should match what we have in adreno_smmu_fault_info unless things have gone horribly wrong), and the pagetable entries traversed in the process of resolving the faulting iova. Signed-off-by: Rob Clark --- v2: Fix build error on 32b/armv7 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 10 ++++++++++ drivers/gpu/drm/msm/msm_gpu.c | 10 ++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 8 ++++++++ drivers/gpu/drm/msm/msm_iommu.c | 17 +++++++++++++++++ drivers/gpu/drm/msm/msm_mmu.h | 2 ++ 5 files changed, 47 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 42e522a60623..7bac86b01f30 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -707,6 +707,16 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, drm_printf(p, " - dir: %s\n", info->flags & IOMMU_FAULT_WRITE ? "WRITE" : "READ"); drm_printf(p, " - type: %s\n", info->type); drm_printf(p, " - source: %s\n", info->block); + + /* Information extracted from what we think are the current + * pgtables. Hopefully the TTBR0 matches what we've extracted + * from the SMMU registers in smmu_info! + */ + drm_puts(p, "pgtable-fault-info:\n"); + drm_printf(p, " - ttbr0: %.16llx\n", (u64)info->pgtbl_ttbr0); + drm_printf(p, " - asid: %d\n", info->asid); + drm_printf(p, " - ptes: %.16llx %.16llx %.16llx %.16llx\n", + info->ptes[0], info->ptes[1], info->ptes[2], info->ptes[3]); } drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 8a3a592da3a4..d1a16642ecd5 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -284,6 +284,16 @@ static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, if (submit) { int i, nr = 0; + if (state->fault_info.smmu_info.ttbr0) { + struct msm_gpu_fault_info *info = &state->fault_info; + struct msm_mmu *mmu = submit->aspace->mmu; + + msm_iommu_pagetable_params(mmu, &info->pgtbl_ttbr0, + &info->asid); + msm_iommu_pagetable_walk(mmu, info->iova, info->ptes, + ARRAY_SIZE(info->ptes)); + } + /* count # of buffers to dump: */ for (i = 0; i < submit->nr_bos; i++) if (should_dump(submit, i)) diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 0e132795123f..ab4c80065ac5 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -78,6 +78,14 @@ struct msm_gpu_fault_info { int flags; const char *type; const char *block; + + /* Information about what we think/expect is the current SMMU state, + * for example expected_ttbr0 should match smmu_info.ttbr0 which + * was read back from SMMU registers. + */ + phys_addr_t pgtbl_ttbr0; + u64 ptes[4]; + int asid; }; /** diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c index bcaddbba564d..0f2924fd2524 100644 --- a/drivers/gpu/drm/msm/msm_iommu.c +++ b/drivers/gpu/drm/msm/msm_iommu.c @@ -116,6 +116,23 @@ int msm_iommu_pagetable_params(struct msm_mmu *mmu, return 0; } +int msm_iommu_pagetable_walk(struct msm_mmu *mmu, unsigned long iova, + u64 *ptes, int num_ptes) +{ + struct msm_iommu_pagetable *pagetable; + + if (mmu->type != MSM_MMU_IOMMU_PAGETABLE) + return -EINVAL; + + pagetable = to_pagetable(mmu); + + if (!pagetable->pgtbl_ops->pgtable_walk) + return -EINVAL; + + return pagetable->pgtbl_ops->pgtable_walk(pagetable->pgtbl_ops, iova, + ptes, &num_ptes); +} + static const struct msm_mmu_funcs pagetable_funcs = { .map = msm_iommu_pagetable_map, .unmap = msm_iommu_pagetable_unmap, diff --git a/drivers/gpu/drm/msm/msm_mmu.h b/drivers/gpu/drm/msm/msm_mmu.h index de158e1bf765..519b749c61af 100644 --- a/drivers/gpu/drm/msm/msm_mmu.h +++ b/drivers/gpu/drm/msm/msm_mmu.h @@ -58,5 +58,7 @@ void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base, int msm_iommu_pagetable_params(struct msm_mmu *mmu, phys_addr_t *ttbr, int *asid); +int msm_iommu_pagetable_walk(struct msm_mmu *mmu, unsigned long iova, + u64 *ptes, int num_ptes); #endif /* __MSM_MMU_H__ */