From patchwork Wed Oct 20 18:48:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12573097 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 415EBC433EF for ; Wed, 20 Oct 2021 18:54:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1191361038 for ; Wed, 20 Oct 2021 18:54:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1191361038 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zp0p34aRBR+FtXcEY33TrVNXmBrkAw1zRoraIIipP3w=; b=LAzb0lDNPszdJ+ imlNIMViA4dR47Zkfv/GDCxoNeImtTrHt6mEPZQQ+SHKWHrg+53NHMeB/cWqn76nstJfOgCNvZ/Mb oWLbloAM2XI0bRqGfcOnbjv8w8pfXUYaKYSUyDNcwGkRRjI2BJblitaBGQ1tVyGfp5LGYIKUv47hs gAKhh/idbiyvDj6vDeh/qHthz+N79n6lk6p8xgSUPcqwg85JcE9Fq8TFqPOzHSeaDPdKZOkuZiq+/ Oo04CdDPULD6ORema/FcWugnW4lrkPbrg1mlxjW+GjQL3vs9ZyItYW3zXaQxaSfHSUpiS4wZ2w/gl BdTZ368gx9QoP1kaY0Rg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mdGi5-005XRr-PS; Wed, 20 Oct 2021 18:53:10 +0000 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mdGff-005Vy7-5f for linux-arm-kernel@lists.infradead.org; Wed, 20 Oct 2021 18:50:40 +0000 Received: by mail-pg1-x535.google.com with SMTP id s136so20098615pgs.4 for ; Wed, 20 Oct 2021 11:50:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cLaNe7Oyl1seZD/HRHq9xGsMnTdlxwayLK+zY+0ZWyA=; b=eWNs5Mnvme97WQSMJokR02PWbB2Lbzy5vzIqzjIjmzrxvXbCddeL0g1HcZOptmr9vt c+FAWUzmQWJjMRHPgSRszzdm54w0lujwkDFs6c0hfReJUM8diXofq3zEB2iBK0W7hIKa I4uh9s6tMyhUdQUmEefAO8aPpZjD95xd6NdaGMbBj1hTbZO3nnJyO1YJ4dwIAzx7+Go6 MEsFOX/iC9gWGngcgM4XDSWlwFSTKuoDsQPua1Dd8KExboRqJyCg14aZTnl/VopsSOvC LuibhxzAX/OY8QdNFwPGx2+FoiUJuURG0zCw/u6Z0uKuyVoIU+0csM51cAkjLzNB1Kdh 38wQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cLaNe7Oyl1seZD/HRHq9xGsMnTdlxwayLK+zY+0ZWyA=; b=oaOz6pDQ2EtdP5BCYwqsB+nfq2vi2+iOW9CvOnJ2br7JsVhtHoOwlhUo+lbIqPpUV+ DIbk+VcsfE5gHhTumhu5XF23JGdAklSKT2tzrE0ci3syoQf8QfJU2HfpbQf4XuRIBP7s d+rAbaq8X+/kDvFkw76G4EicbGaMB6H+VP3j3ESvktgH8RbU9FmXfa0JK3cUw1Kb5yo2 oRF7GUxK91zmpjRHlmGbP6fRRb7hchm4IUt3LvAbwc+JfAqlVDWMefX9//NDvDo7d2BZ Xn7bOaiPXAalX9cW8Zdw2grTORVkaoNCh7k3B2786MMAEmuKHnwyALQlNakEXXNkYuFu U0FA== X-Gm-Message-State: AOAM533UBjK+QJKQ0yyezhj0wj/0l74y/T9/TSZsCp2fSdb/3Nd9cjbX rPdISYkKzK+s1DUoTEpKrlY= X-Google-Smtp-Source: ABdhPJzySpSnG3P8ExOadZUwVRbxgdNtASFVaCKX6wZfO7HyjtvQIApkthnPzFi4Pp/i7ELfom0RYA== X-Received: by 2002:a62:1408:0:b0:44d:1f0b:49be with SMTP id 8-20020a621408000000b0044d1f0b49bemr1073536pfu.28.1634755838331; Wed, 20 Oct 2021 11:50:38 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id o127sm3267863pfb.216.2021.10.20.11.50.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 11:50:37 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v6 07/13] genirq: Export irq_gc_{unmask_enable, mask_disable}_reg Date: Wed, 20 Oct 2021 11:48:53 -0700 Message-Id: <20211020184859.2705451-8-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211020184859.2705451-1-f.fainelli@gmail.com> References: <20211020184859.2705451-1-f.fainelli@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211020_115039_227718_BD569493 X-CRM114-Status: GOOD ( 11.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In order to allow drivers/irqchip/irq-brcmstb-l2.c to be built as a module we need to export: irq_gc_unmask_enable_reg() and irq_gc_mask_disable_reg(). Signed-off-by: Florian Fainelli --- kernel/irq/generic-chip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index cc7cdd26e23e..4c011c21bb1a 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -44,6 +44,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d) *ct->mask_cache &= ~mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_mask_disable_reg); /** * irq_gc_mask_set_bit - Mask chip via setting bit in mask register @@ -103,6 +104,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d) *ct->mask_cache |= mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_unmask_enable_reg); /** * irq_gc_ack_set_bit - Ack pending interrupt via setting bit