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Thu, 21 Oct 2021 06:45:55 -0700 (PDT) Received: from localhost ([103.127.241.129]) by smtp.gmail.com with ESMTPSA id n14sm5383076pgd.68.2021.10.21.06.45.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 06:45:54 -0700 (PDT) From: Leo Yan To: Catalin Marinas , Will Deacon , Mark Rutland , Kees Cook , Ard Biesheuvel , Sami Tolvanen , Nicholas Piggin , James Morse , Marc Zyngier , Joey Gouly , Peter Collingbourne , Vincenzo Frascino , "Peter Zijlstra (Intel)" , Stephane Eranian , James Clark , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [RFCv1 4/4] perf: arm_spe: Dynamically switch PID tracing to contextidr Date: Thu, 21 Oct 2021 21:45:30 +0800 Message-Id: <20211021134530.206216-5-leo.yan@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021134530.206216-1-leo.yan@linaro.org> References: <20211021134530.206216-1-leo.yan@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211021_064556_716939_6E6D4C7B X-CRM114-Status: GOOD ( 15.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now Arm64 provides API for enabling and disable PID tracing, Arm SPE driver invokes these functions to dynamically enable it during profiling when the program runs in root PID name space, and disable PID tracing when the perf event is stopped. Device drivers should not depend on CONFIG_PID_IN_CONTEXTIDR for PID tracing, so this patch uses the consistent condition for setting bit EL1_CX for PMSCR. Signed-off-by: Leo Yan --- drivers/perf/arm_spe_pmu.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index d44bcc29d99c..935343cdcb39 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -272,7 +273,7 @@ static u64 arm_spe_event_to_pmscr(struct perf_event *event) if (!attr->exclude_kernel) reg |= BIT(SYS_PMSCR_EL1_E1SPE_SHIFT); - if (IS_ENABLED(CONFIG_PID_IN_CONTEXTIDR) && perfmon_capable()) + if (perfmon_capable() && (task_active_pid_ns(current) == &init_pid_ns)) reg |= BIT(SYS_PMSCR_EL1_CX_SHIFT); return reg; @@ -731,6 +732,13 @@ static void arm_spe_pmu_start(struct perf_event *event, int flags) if (hwc->state) return; + /* + * Enable tracing PID to contextidr if profiling program runs in + * root PID namespace. + */ + if (perfmon_capable() && (task_active_pid_ns(current) == &init_pid_ns)) + contextidr_enable(); + reg = arm_spe_event_to_pmsfcr(event); write_sysreg_s(reg, SYS_PMSFCR_EL1); @@ -792,6 +800,9 @@ static void arm_spe_pmu_stop(struct perf_event *event, int flags) } hwc->state |= PERF_HES_STOPPED; + + if (perfmon_capable() && (task_active_pid_ns(current) == &init_pid_ns)) + contextidr_disable(); } static int arm_spe_pmu_add(struct perf_event *event, int flags)