From patchwork Wed Nov 17 15:38:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Elisei X-Patchwork-Id: 12692953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00A59C433EF for ; Wed, 17 Nov 2021 15:51:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B7B6661261 for ; Wed, 17 Nov 2021 15:51:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B7B6661261 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=M3IDYwFZWNXSjCXX8Y3Pr6KS1fzqejqX/eWVLOlw3G8=; b=BqIFDGUNI3Scmh a87Ao0dO27f1wjMqsmHLINqYOmc6SMDBSSbIfmNO/2MWbAEmSZKkX3x1TPkKA7u5+rLK4lwVgXgfo i6nMhsa7DuCR+2Ib78WENho9Cx5a0TDFpitXoY5V4JhA1AVQpfw4gFqVzSeS5qVrPGJ5KfV8Vn+0O g/pDkNE9NsAlREFDpr88YINI/Oyhzv5QlliY4bAcpifKPOEShXT4Ho0BDA6d3WEO7T9M+I6EMcEHy 1kMtTHb0xPuD2mGC798GUYpQydVnY+IzYSSe+Q2Q59TiGSbLfttMKhMLqO43GnrMQB+T1KhyqzGMA j6XcUi92+eYcODGD+L5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mnNCE-005VyU-AK; Wed, 17 Nov 2021 15:50:03 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mnN0E-005Q8d-Vp for linux-arm-kernel@lists.infradead.org; Wed, 17 Nov 2021 15:37:40 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8062FED1; Wed, 17 Nov 2021 07:37:38 -0800 (PST) Received: from monolith.localdoman (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B879A3F5A1; Wed, 17 Nov 2021 07:37:36 -0800 (PST) From: Alexandru Elisei To: maz@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, will@kernel.org, mark.rutland@arm.com Cc: Sudeep Holla Subject: [RFC PATCH v5 21/38] KVM: arm64: Add SPE VCPU device attribute to set the interrupt number Date: Wed, 17 Nov 2021 15:38:25 +0000 Message-Id: <20211117153842.302159-22-alexandru.elisei@arm.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211117153842.302159-1-alexandru.elisei@arm.com> References: <20211117153842.302159-1-alexandru.elisei@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211117_073739_165601_2E8DB02D X-CRM114-Status: GOOD ( 18.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Sudeep Holla Add KVM_ARM_VCPU_SPE_CTRL(KVM_ARM_VCPU_SPE_IRQ) to allow the user to set the interrupt number for the buffer management interrupt. [ Alexandru E: Split from "KVM: arm64: Add a new VCPU device control group for SPE" ] Signed-off-by: Sudeep Holla Signed-off-by: Alexandru Elisei --- Documentation/virt/kvm/devices/vcpu.rst | 19 ++++++ arch/arm64/include/asm/kvm_host.h | 2 + arch/arm64/include/asm/kvm_spe.h | 10 +++ arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/spe.c | 86 +++++++++++++++++++++++++ 5 files changed, 118 insertions(+) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index c200545d4950..a27b149c3b8b 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -236,3 +236,22 @@ From the destination VMM process: =============================== :Architectures: ARM64 + +5.1 ATTRIBUTE: KVM_ARM_VCPU_SPE_IRQ +----------------------------------- + +:Parameters: in kvm_device_attr.addr the address for the Profiling Buffer + management interrupt number as a pointer to an int + +Returns: + + ======= ====================================================== + -EBUSY Interrupt number already set for this VCPU + -EFAULT Error accessing the buffer management interrupt number + -EINVAL Invalid interrupt number + -ENXIO SPE not supported or not properly configured + ======= ====================================================== + +Specifies the Profiling Buffer management interrupt number. The interrupt number +must be a PPI and the interrupt number must be the same for each VCPU. SPE +emulation requires an in-kernel vGIC implementation. diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 96ce98f6135d..8c6e6eef0ae9 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -26,6 +26,7 @@ #include #include #include +#include #include #define __KVM_HAVE_ARCH_INTC_INITIALIZED @@ -357,6 +358,7 @@ struct kvm_vcpu_arch { struct vgic_cpu vgic_cpu; struct arch_timer_cpu timer_cpu; struct kvm_pmu pmu; + struct kvm_vcpu_spe spe; /* * Anything that is not used directly from assembly code goes diff --git a/arch/arm64/include/asm/kvm_spe.h b/arch/arm64/include/asm/kvm_spe.h index 6443f9b66e4c..a5484953d06f 100644 --- a/arch/arm64/include/asm/kvm_spe.h +++ b/arch/arm64/include/asm/kvm_spe.h @@ -6,6 +6,8 @@ #ifndef __ARM64_KVM_SPE_H__ #define __ARM64_KVM_SPE_H__ +#include + #ifdef CONFIG_KVM_ARM_SPE DECLARE_STATIC_KEY_FALSE(kvm_spe_available); @@ -14,6 +16,11 @@ static __always_inline bool kvm_supports_spe(void) return static_branch_likely(&kvm_spe_available); } +struct kvm_vcpu_spe { + bool initialized; /* SPE initialized for the VCPU */ + int irq_num; /* Buffer management interrut number */ +}; + int kvm_spe_vcpu_enable_spe(struct kvm_vcpu *vcpu); int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); @@ -22,6 +29,9 @@ int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); #else #define kvm_supports_spe() (false) +struct kvm_vcpu_spe { +}; + static inline int kvm_spe_vcpu_enable_spe(struct kvm_vcpu *vcpu) { return 0; diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index 7159a1e23da2..c55d94a1a8f5 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -369,6 +369,7 @@ struct kvm_arm_copy_mte_tags { #define KVM_ARM_VCPU_PVTIME_CTRL 2 #define KVM_ARM_VCPU_PVTIME_IPA 0 #define KVM_ARM_VCPU_SPE_CTRL 3 +#define KVM_ARM_VCPU_SPE_IRQ 0 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/arch/arm64/kvm/spe.c b/arch/arm64/kvm/spe.c index e3f82be398a6..7520d7925460 100644 --- a/arch/arm64/kvm/spe.c +++ b/arch/arm64/kvm/spe.c @@ -45,17 +45,103 @@ int kvm_spe_vcpu_enable_spe(struct kvm_vcpu *vcpu) return 0; } +static bool kvm_vcpu_supports_spe(struct kvm_vcpu *vcpu) +{ + if (!kvm_supports_spe()) + return false; + + if (!kvm_vcpu_has_spe(vcpu)) + return false; + + if (!irqchip_in_kernel(vcpu->kvm)) + return false; + + return true; +} + +static bool kvm_spe_irq_is_valid(struct kvm *kvm, int irq) +{ + struct kvm_vcpu *vcpu; + int i; + + if (!irq_is_ppi(irq)) + return -EINVAL; + + kvm_for_each_vcpu(i, vcpu, kvm) { + if (!vcpu->arch.spe.irq_num) + continue; + + if (vcpu->arch.spe.irq_num != irq) + return false; + } + + return true; +} + int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { + if (!kvm_vcpu_supports_spe(vcpu)) + return -ENXIO; + + if (vcpu->arch.spe.initialized) + return -EBUSY; + + switch (attr->attr) { + case KVM_ARM_VCPU_SPE_IRQ: { + int __user *uaddr = (int __user *)(long)attr->addr; + int irq; + + if (vcpu->arch.spe.irq_num) + return -EBUSY; + + if (get_user(irq, uaddr)) + return -EFAULT; + + if (!kvm_spe_irq_is_valid(vcpu->kvm, irq)) + return -EINVAL; + + kvm_debug("Set KVM_ARM_VCPU_SPE_IRQ: %d\n", irq); + vcpu->arch.spe.irq_num = irq; + return 0; + } + } + return -ENXIO; } int kvm_spe_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { + if (!kvm_vcpu_supports_spe(vcpu)) + return -ENXIO; + + switch (attr->attr) { + case KVM_ARM_VCPU_SPE_IRQ: { + int __user *uaddr = (int __user *)(long)attr->addr; + int irq; + + if (!vcpu->arch.spe.irq_num) + return -ENXIO; + + irq = vcpu->arch.spe.irq_num; + if (put_user(irq, uaddr)) + return -EFAULT; + + return 0; + } + } + return -ENXIO; } int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) { + if (!kvm_vcpu_supports_spe(vcpu)) + return -ENXIO; + + switch(attr->attr) { + case KVM_ARM_VCPU_SPE_IRQ: + return 0; + } + return -ENXIO; }