From patchwork Sun Nov 21 16:56:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12693229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE763C433FE for ; Sun, 21 Nov 2021 16:59:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kv/p224vczbMuEYPc1ocej6ggGmjkuUtw3iv3cvAv2A=; b=Jh1A5CRezIR+PT tvR4bWFpPowXnJBW+fdbuyEC26hjUqcYXI3or1DzxyhbPNcboIiiuxXp3q0njk65/pfJnsaBOtrPT mRP6zBku9PJQIsLSdyRtAuf/wGDFsxJBqBSsBACAaxuL+Y9YnG8qVprnm8fcHD1OplZp6yUj80FfE 1txG1X8UyVgOpsopEA5mM8SIH+ztfFOhm6mfTDnLISCMYZXkmCBBfFzktdldMF7WQcZMU3vPe6RQd 5hjMOPEtswdJFnd7PSd3/72cvcn8M89z31qMsNgZDhWEAPyOjWay0rcC2iUe5EFeNzfVleLh4FXBR t0uhN0o6TQZeObSuxV6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1moqAb-00DwqI-20; Sun, 21 Nov 2021 16:58:25 +0000 Received: from mail-lf1-x12d.google.com ([2a00:1450:4864:20::12d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1moq9F-00DwHo-0f for linux-arm-kernel@lists.infradead.org; Sun, 21 Nov 2021 16:57:02 +0000 Received: by mail-lf1-x12d.google.com with SMTP id b1so68823102lfs.13 for ; Sun, 21 Nov 2021 08:57:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=w/ReIV9vPB+SlV62g0/7W7w+YosGosPLABDbJjtZop0=; b=YSdnJYW/oiUpy6rnmhc7QbCWuopiisa+YOVQXuiJixMUSsN9wUgVCcX2diI8gN/5LB 6yZqB3gSay4/MYBVrC+8B5f7y0CTV4BD6dMa1e6B3Ox1f0i1h6xxhFh1jnrzpRSde8GS yk96729F34/ijiTL+Q4xI9tcrFBnoChpmpgHd902lnpLYtFuUegHDW5pVWLDfuNaZHfT x/yBm0u9yOvvs3wBVvvi8Y1vSs9Hpp1DqmeAeLItw7LfYebqDTpmgZDx2T+S7i6/8V9p 9DRiSl+N12Kd+Sw1DlgEL+RL5pNJHiqnHKlxmb4d8xG4z7xbq9rEogud4q5ncQKP8VZ7 lfwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=w/ReIV9vPB+SlV62g0/7W7w+YosGosPLABDbJjtZop0=; b=onEc0qFlxuY6GtShEe7Tk+vZWzMtbmfPCo9Zctcef8DgDlglWyjaDv4NMVOqb2ZNFL xTB6h4nKa53Yf1VvNOgoaUjUptABysvvxVNm8h2n7rDedeCr8IydGnoG8sxP16mWLWDs qGEwL1wLYXqIsWht0hSRUKmndaSIJ9hlkabOBncaRLVlSxO1o+BK4RI7s1H3sXNLpwDs eX7mQaQI8eFp79hcXvnSipZlcGRo6m4CHPTvy9wQQCeVMK3xt7Gj76kM9s7fhr3UyKIj KTT1FVV+/sJVJfJDoYgy2yxIWX0iDv28/vkz9LN5ZdQU/jHgrShe2Cyj0yd2XY4K3aH/ jHdA== X-Gm-Message-State: AOAM531eLxJgkHZG1wa0IbGf9KUa5Md95aNqpt6/Hxe4J7pwyvMBnG0n OrcqWOzOwfqCbHTCxo3AKM1X6Q== X-Google-Smtp-Source: ABdhPJxES9MI06twnz6pLMWUtyv7RPFPskZMiKkvFzExPfiH40MdmiiwPMiKizWmOQ+yLBJlXhUQlQ== X-Received: by 2002:a2e:8e88:: with SMTP id z8mr42983183ljk.197.1637513819129; Sun, 21 Nov 2021 08:56:59 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id w5sm692277lfd.198.2021.11.21.08.56.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Nov 2021 08:56:58 -0800 (PST) From: Sam Protsenko To: Guenter Roeck , Wim Van Sebroeck Cc: Rob Herring , Krzysztof Kozlowski , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v4 06/12] watchdog: s3c2410: Extract disable and mask code into separate functions Date: Sun, 21 Nov 2021 18:56:41 +0200 Message-Id: <20211121165647.26706-7-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211121165647.26706-1-semen.protsenko@linaro.org> References: <20211121165647.26706-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211121_085701_082695_7D48BFAC X-CRM114-Status: GOOD ( 16.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The s3c2410wdt_mask_and_disable_reset() function content is bound to be changed further. Prepare it for upcoming changes by splitting into separate "mask reset" and "disable reset" functions. But keep s3c2410wdt_mask_and_disable_reset() function present as a facade. This commit doesn't bring any functional change to existing devices, but merely provides an infrastructure for upcoming chips support. Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski Reviewed-by: Guenter Roeck --- Changes in v4: - Added R-b tag by Guenter Roeck Changes in v3: - Added R-b tag by Krzysztof Kozlowski Changes in v2: - (none): it's a new patch drivers/watchdog/s3c2410_wdt.c | 54 ++++++++++++++++++++++------------ 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 2cc4923a98a5..4ac0a30e835e 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -202,37 +202,53 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb) return container_of(nb, struct s3c2410_wdt, freq_transition); } -static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask) +static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask) { + const u32 mask_val = BIT(wdt->drv_data->mask_bit); + const u32 val = mask ? mask_val : 0; int ret; - u32 mask_val = 1 << wdt->drv_data->mask_bit; - u32 val = 0; - /* No need to do anything if no PMU CONFIG needed */ - if (!(wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG)) - return 0; + ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->disable_reg, + mask_val, val); + if (ret < 0) + dev_err(wdt->dev, "failed to update reg(%d)\n", ret); - if (mask) - val = mask_val; + return ret; +} - if (wdt->drv_data->quirks & QUIRK_HAS_PMU_AUTO_DISABLE) { - ret = regmap_update_bits(wdt->pmureg, - wdt->drv_data->disable_reg, mask_val, - val); - if (ret < 0) - goto error; - } +static int s3c2410wdt_mask_wdt_reset(struct s3c2410_wdt *wdt, bool mask) +{ + const u32 mask_val = BIT(wdt->drv_data->mask_bit); + const u32 val = mask ? mask_val : 0; + int ret; - ret = regmap_update_bits(wdt->pmureg, - wdt->drv_data->mask_reset_reg, - mask_val, val); - error: + ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->mask_reset_reg, + mask_val, val); if (ret < 0) dev_err(wdt->dev, "failed to update reg(%d)\n", ret); return ret; } +static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask) +{ + int ret; + + if (wdt->drv_data->quirks & QUIRK_HAS_PMU_AUTO_DISABLE) { + ret = s3c2410wdt_disable_wdt_reset(wdt, mask); + if (ret < 0) + return ret; + } + + if (wdt->drv_data->quirks & QUIRK_HAS_PMU_CONFIG) { + ret = s3c2410wdt_mask_wdt_reset(wdt, mask); + if (ret < 0) + return ret; + } + + return 0; +} + static int s3c2410wdt_keepalive(struct watchdog_device *wdd) { struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);