From patchwork Mon Nov 22 09:50:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12693288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97B21C433F5 for ; Mon, 22 Nov 2021 10:33:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K3cc2IYjHZY81UJAWz+ypuGLJbNGSEysNWq52UUwL3M=; b=CNcXzxZkXHURyr O2arr2Z9LMJmNnDKu9n/q/vCLKO3H8YBbYBAzEgvCJf6bHg/ttF+QHWR333Kl5AVQ1J4+VYWU10+z jRgMrdONFQIWDLq+IxEbZArf6qc82dK/aFyyYyc0GyN36/e5rFVe3NAJBOcS0nUBfAO0rxtVnRqVZ ZVfZwR77T55zjUizlgnGltAhXsRxcHO4Y3GxTlqiSQAD2w0tMgvf8G4cc4WHZUelxAk1jWEAF8Sjm fbIkrKRXvv4Bd+PD7K/SvMVJ4qCkz4xvSC8O1hTyMiiqtHoieh601Ir7uMxfeAPksGC1AjkH3DC4r lJ6FAbJG7CDt6da40xfg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mp6bz-00Fr7q-7m; Mon, 22 Nov 2021 10:31:47 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mp5yb-00FguM-2x; Mon, 22 Nov 2021 09:51:06 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1637574664; x=1669110664; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G++AZegXG6OJFxY33wkZV7lC2nsSie4mebL61LveTYg=; b=E4Sjo4a+EXMv5cAr0GOmdx98mq5Pom1JTKk2AGFfZQVB3/zB0En/ETk9 dM9zxW/0RsXLAJCiNl9nXHVXrGLhkL7GATg1+9SsGIMIJN9dIKIwtEh1L nPuinK6vFb+ftJePX9eJAC6fm9D/M5olrchNiQC8gotxYPit/EQ7kGfIT gAIVyH1uDjhZOqVRMazy2z3IsLFSPJtzXkllINFTO4arUk19V/Ab5XF4L kVkucVeZ0MymYSqswYufUIvkh+v0g2e4aZcyBo12VfoImthiAoArf1yrx DPbfmUOXJhEEEc90qWRoLpzJboNIZAGhFZe6e/ujcJA5phk+XlcN+plBV A==; IronPort-SDR: TrDXZwC6yvhRq1b1+umN8cRD4+hYc3CNzYBl7+zQhQ5eqj5f1KvHjFrg+EQipu1x4jpEvmBF1m HfJTSqEFFkvWR6QKDlInhC9wMyVnW5Tus1g8O9xxM4aMHiXDFF01kBTMVWa1gSTWU5xg9+QRiv J7Z5oS5GZJvfi3ttjGpz5cxSpbBcogimEwdAIo1gNGehVE5HsPGiZC81y7+coVSTZQENdo1IqL AIg9pmYKcK/BocLqeJwwXyJRkGmhb5Riu/Bei7tUWUFnZbJ3iKA3nt0SAPDz6rCRmKM5DiBn2Y DvEubHI8vnO9oe4ZX/ubRkTF X-IronPort-AV: E=Sophos;i="5.87,254,1631602800"; d="scan'208";a="152761267" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Nov 2021 02:51:03 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 22 Nov 2021 02:51:03 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Mon, 22 Nov 2021 02:50:58 -0700 From: Tudor Ambarus To: , , Subject: [PATCH v4 07/13] mtd: spi-nor: Introduce spi_nor_init_fixup_flags() Date: Mon, 22 Nov 2021 11:50:14 +0200 Message-ID: <20211122095020.393346-8-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211122095020.393346-1-tudor.ambarus@microchip.com> References: <20211122095020.393346-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211122_015105_200551_2033338A X-CRM114-Status: GOOD ( 13.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw, Tudor Ambarus , richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk, knaerzche@gmail.com, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch, miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de, figgyc@figgyc.uk, mail@david-bauer.net, zhengxunli@mxic.com.tw Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Group NOR flags initialization. Introduce a dedicated function for setting the fixup_flags and emphasise when those flash_info flags should be set: when the SNOR_F_4B_OPCODES/SNOR_F_IO_MODE_EN_VOLATILE setttings can not be discovered by SFDP for this particular flash because the SFDP table that indicates this support is not defined in the flash. In case the table for his support is defined but has wrong values, one should instead use a post_sfdp() hook to set the SNOR_F equivalent flag. No functional change intended in this patch. Signed-off-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- v4: no changes drivers/mtd/spi-nor/core.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 14f92d105878..43668978ca5e 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2692,6 +2692,25 @@ static void spi_nor_init_flags(struct spi_nor *nor) nor->flags |= SNOR_F_READY_XSR_RDY; } +/** + * spi_nor_init_fixup_flags() - Initialize NOR flags for settings that can not + * be discovered by SFDP for this particular flash because the SFDP table that + * indicates this support is not defined in the flash. In case the table for + * this support is defined but has wrong values, one should instead use a + * post_sfdp() hook to set the SNOR_F equivalent flag. + * @nor: pointer to a 'struct spi_nor' + */ +static void spi_nor_init_fixup_flags(struct spi_nor *nor) +{ + const u8 fixup_flags = nor->info->fixup_flags; + + if (fixup_flags & SPI_NOR_4B_OPCODES) + nor->flags |= SNOR_F_4B_OPCODES; + + if (fixup_flags & SPI_NOR_IO_MODE_EN_VOLATILE) + nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE; +} + /** * spi_nor_late_init_params() - Late initialization of default flash parameters. * @nor: pointer to a 'struct spi_nor' @@ -2710,6 +2729,7 @@ static void spi_nor_late_init_params(struct spi_nor *nor) nor->info->fixups->late_init(nor); spi_nor_init_flags(nor); + spi_nor_init_fixup_flags(nor); /* * NOR protection support. When locking_ops are not provided, we pick @@ -3147,7 +3167,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, struct mtd_info *mtd = &nor->mtd; int ret; int i; - u8 fixup_flags; ret = spi_nor_check(nor); if (ret) @@ -3197,13 +3216,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, if (ret) return ret; - fixup_flags = info->fixup_flags; - if (fixup_flags & SPI_NOR_4B_OPCODES) - nor->flags |= SNOR_F_4B_OPCODES; - - if (fixup_flags & SPI_NOR_IO_MODE_EN_VOLATILE) - nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE; - ret = spi_nor_set_addr_width(nor); if (ret) return ret;