| Message ID | 20211122134159.29936-2-a-govindraju@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | CAN: Add support for CAN in AM65,J721e and AM64 | expand |
On 22/11/21 7:11 pm, Aswath Govindraju wrote: > From: Faiz Abbas <faiz_abbas@ti.com> > > Add Support for two MCAN controllers present on the am65x SOC. Both support > classic CAN messages as well as CAN-FD. > > Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Apurva Nandan <a-nandan@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 30 +++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > index c93ff1520a0e..8d592bf41d6f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi > @@ -159,6 +159,36 @@ > }; > }; > > + m_can0: mcan@40528000 { > + compatible = "bosch,m_can"; > + reg = <0x0 0x40528000 0x0 0x400>, > + <0x0 0x40500000 0x0 0x4400>; > + reg-names = "m_can", "message_ram"; > + power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 102 5>, <&k3_clks 102 0>; > + clock-names = "hclk", "cclk"; > + interrupt-parent = <&gic500>; > + interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "int0", "int1"; > + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; > + }; > + > + m_can1: mcan@40568000 { > + compatible = "bosch,m_can"; > + reg = <0x0 0x40568000 0x0 0x400>, > + <0x0 0x40540000 0x0 0x4400>; > + reg-names = "m_can", "message_ram"; > + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 103 5>, <&k3_clks 103 0>; > + clock-names = "hclk", "cclk"; > + interrupt-parent = <&gic500>; > + interrupts = <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "int0", "int1"; > + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; > + }; > + > fss: fss@47000000 { > compatible = "simple-bus"; > #address-cells = <2>;
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index c93ff1520a0e..8d592bf41d6f 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -159,6 +159,36 @@ }; }; + m_can0: mcan@40528000 { + compatible = "bosch,m_can"; + reg = <0x0 0x40528000 0x0 0x400>, + <0x0 0x40500000 0x0 0x4400>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 102 5>, <&k3_clks 102 0>; + clock-names = "hclk", "cclk"; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + }; + + m_can1: mcan@40568000 { + compatible = "bosch,m_can"; + reg = <0x0 0x40568000 0x0 0x400>, + <0x0 0x40540000 0x0 0x4400>; + reg-names = "m_can", "message_ram"; + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 103 5>, <&k3_clks 103 0>; + clock-names = "hclk", "cclk"; + interrupt-parent = <&gic500>; + interrupts = <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + }; + fss: fss@47000000 { compatible = "simple-bus"; #address-cells = <2>;