From patchwork Wed Dec 1 11:02:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Murzin X-Patchwork-Id: 12694293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2D3A1C433F5 for ; Wed, 1 Dec 2021 11:07:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=CMyvYwzOm/KbwjppFXXR2Fo3FMIE8k7AGJqdVv0Wy7Q=; b=oyPVtOKxqJafZX 2TULgFBvoLOu+7rOs6NVnF2l1gZBrkNV3LAljaLGISD44ypLu9AJpUYD99RJqWxrhjPE7n6kkLtYV uXpItsx/KrFtRWRY+HLsxLQrrqtJXGtHoOTdIVTptGgPbmvy5Cc9ND4OBZxrOUlFsPCP/FFHiZOaY 1FnV6+X5lF9yt16gY38UGcmCC/4zhVP4LFi/lo/Vru2X2t/Xi0rhef8uRawDxQQGGt4rJSDkMkYjq 9rePDxi1gq50TpcW0uNnyzcc+ZYY2CAjsT07vI1cym4H4TVRhTYU3NXhmTgbbBLEVX5r+iH4YLMlO 64F7H+P9vqBLs9MQv80A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msNR8-008Buu-Vp; Wed, 01 Dec 2021 11:06:07 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msNR5-008BtK-9C for linux-arm-kernel@lists.infradead.org; Wed, 01 Dec 2021 11:06:04 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2AEE611B3; Wed, 1 Dec 2021 03:05:59 -0800 (PST) Received: from login2.euhpc.arm.com (login2.euhpc.arm.com [10.6.27.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6D41A3F694; Wed, 1 Dec 2021 03:05:58 -0800 (PST) From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk Cc: mark.rutland@arm.com, maz@kernel.org Subject: [PATCH 1/2] irqchip: nvic: Fix offset for Interrupt Priority Offsets Date: Wed, 1 Dec 2021 11:02:58 +0000 Message-Id: <20211201110259.84857-1-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211201_030603_386585_988C4556 X-CRM114-Status: UNSURE ( 9.11 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to ARM(v7M) ARM Interrupt Priority Offsets located at 0xE000E400-0xE000E5EC, while 0xE000E300-0xE000E33C covers read-only Interrupt Active Bit Registers Fixes: 292ec080491d ("irqchip: Add support for ARMv7-M NVIC") Signed-off-by: Vladimir Murzin --- drivers/irqchip/irq-nvic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c index 63bac3f..ba4759b 100644 --- a/drivers/irqchip/irq-nvic.c +++ b/drivers/irqchip/irq-nvic.c @@ -26,7 +26,7 @@ #define NVIC_ISER 0x000 #define NVIC_ICER 0x080 -#define NVIC_IPR 0x300 +#define NVIC_IPR 0x400 #define NVIC_MAX_BANKS 16 /*