From patchwork Fri Dec 3 12:21:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 12694693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 36AE6C433F5 for ; Fri, 3 Dec 2021 12:24:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2yhCyk0ACl6MadM7keEaI4eGQ6JaLtfHc+fgzc3gtSs=; b=w2O/Kwi2E9HS38 NXkb94JWwPJ9qqzWyKqVb0vr8wCbADXaaOfSR3sZ5XjLsghsyHr1+0LCbqsar8hBsQEB/xFl/5r3A 8ipUFHTMY5mINEALN+7QSyVOiPHRdztgNGEow4EX75WAJjETgMUPIGlVaCqVPaHn/NSXegPFQkVpJ cLVEL8QQuX+Z17BYdni4V7CP0sdsJXWG7cgJozEoxqv5nst8qWOiWCmD3MR8ncZ/r98AxlAggsKpM 0tslD0PqxN2W/rrVpmOSGOgXgOcQAu+aVdaebE/kDVrkXN6W7eOsVmSXQ4gBs96M5w5jvbq20y07E jJ4Rw89jn0UiYhMvva+A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt7aC-00Fgft-K7; Fri, 03 Dec 2021 12:22:33 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt7ZA-00FgOU-H6 for linux-arm-kernel@lists.infradead.org; Fri, 03 Dec 2021 12:21:30 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 1B3CLQXM129124; Fri, 3 Dec 2021 06:21:26 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1638534086; bh=9/UEE5CarbORzMfEamnLrbXBfLyI04IWtI+sx5maN34=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oyHtAkEFhGK0jOOp13BogYKiDhIODXkGsDZ5gta+Q5OIyMyFWGxhnqH0WRPl0RQGb qd/cfhzn7EeoiijtVkq0nUC5e75Q8OEWL93ZXn7ONMHsEw/rxvSPaItbwFSu2/Uoot c71o4o74kOdHbwvgDPWmGq1JhEPxQfA4SAspFCa8= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 1B3CLQl2012076 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 3 Dec 2021 06:21:26 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Fri, 3 Dec 2021 06:21:26 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Fri, 3 Dec 2021 06:21:26 -0600 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1B3CLBWP011119; Fri, 3 Dec 2021 06:21:23 -0600 From: Aswath Govindraju To: CC: , , , Rob Herring , Tero Kristo , Nishanth Menon , Vignesh Raghavendra , Kishon Vijay Abraham I , Aswath Govindraju Subject: [PATCH v2 4/5] arm64: dts: ti: Add initial support for J721S2 System on Module Date: Fri, 3 Dec 2021 17:51:09 +0530 Message-ID: <20211203122110.16736-5-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211203122110.16736-1-a-govindraju@ti.com> References: <20211203122110.16736-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211203_042128_701168_2DF8A01B X-CRM114-Status: GOOD ( 13.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A System on Module (SoM) contains the SoC, PMIC, DDR and basic high speed components necessary for functionality. Therefore, add support for the components present on the SoM. SoM: https://www.ti.com/lit/zip/sprr439 Signed-off-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 175 +++++++++++++++++++ 1 file changed, 175 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi new file mode 100644 index 000000000000..76f0ceacb6d4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SoM: https://www.ti.com/lit/zip/sprr439 + * + * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-j721s2.dtsi" +#include + +/ { + memory@80000000 { + device_type = "memory"; + /* 16 GB RAM */ + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x08 0x80000000 0x03 0x80000000>; + }; + + /* Reserving memory regions still pending */ + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; + alignment = <0x1000>; + no-map; + }; + }; + + transceiver0: can-phy0 { + /* standby pin has been grounded by default */ + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&main_pmx0 { + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */ + J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */ + >; + }; + + main_mcan16_pins_default: main-mcan16-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */ + J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */ + >; + }; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + exp_som: gpio@21 { + compatible = "ti,tca6408"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0", + "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1", + "GPIO_RGMII1_RST", "GPIO_eDP_ENABLE", + "GPIO_LIN_EN", "CAN_STB"; + }; +}; + +&main_mcan16 { + pinctrl-0 = <&main_mcan16_pins_default>; + pinctrl-names = "default"; + phys = <&transceiver0>; +}; + +&mailbox0_cluster0 { + status = "disabled"; +}; + +&mailbox0_cluster1 { + status = "disabled"; +}; + +&mailbox0_cluster2 { + status = "disabled"; +}; + +&mailbox0_cluster3 { + status = "disabled"; +}; + +&mailbox0_cluster4 { + status = "disabled"; +}; + +&mailbox0_cluster5 { + status = "disabled"; +}; + +&mailbox0_cluster6 { + status = "disabled"; +}; + +&mailbox0_cluster7 { + status = "disabled"; +}; + +&mailbox0_cluster8 { + status = "disabled"; +}; + +&mailbox0_cluster9 { + status = "disabled"; +}; + +&mailbox0_cluster10 { + status = "disabled"; +}; + +&mailbox0_cluster11 { + status = "disabled"; +}; + +&mailbox1_cluster0 { + status = "disabled"; +}; + +&mailbox1_cluster1 { + status = "disabled"; +}; + +&mailbox1_cluster2 { + status = "disabled"; +}; + +&mailbox1_cluster3 { + status = "disabled"; +}; + +&mailbox1_cluster4 { + status = "disabled"; +}; + +&mailbox1_cluster5 { + status = "disabled"; +}; + +&mailbox1_cluster6 { + status = "disabled"; +}; + +&mailbox1_cluster7 { + status = "disabled"; +}; + +&mailbox1_cluster8 { + status = "disabled"; +}; + +&mailbox1_cluster9 { + status = "disabled"; +}; + +&mailbox1_cluster10 { + status = "disabled"; +}; + +&mailbox1_cluster11 { + status = "disabled"; +};