From patchwork Thu Dec 9 12:29:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12695464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A5BBC433EF for ; Thu, 9 Dec 2021 12:31:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6A8PUWf3GyVy3rxixgzZDdugNozhdSsUX896yrICOq8=; b=W8fesWfvyW/3hD 42rSJFTuXNNGNPFJQfkQxr4ohcUlkc5VrJO9Nc7SN423jYLj+wk1Kau+U91+9R34Ek1w4ORZCAKv1 kvmyZzBUJmH/U6n7uUTD9zYaz8BRGBau0+PkQEQUZdt2ofAmNQz8v6pUiATSpJI/A39pPmOXT1uCn 5JkkBsphavGDqJsG2QDFjRNjr7W/UIOEWo9YVknxkrKp/Dm9uqSZs6h+RPhAZVx6Y2eI0tdPRFg8J gHvyQ1jFOrFFuhXB/raxwaWl0Zeethq3hH6QrpzW7BCU0l3K1CAGnI/wv6wGEOC6b6zgj9a72ihmA gPnoHIxxP/7jADupctNw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvIYu-00FvPW-4o; Thu, 09 Dec 2021 12:30:12 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvIYZ-00FvKH-FX for linux-arm-kernel@lists.infradead.org; Thu, 09 Dec 2021 12:29:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1639052991; x=1670588991; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IF3u07Cvca1snD/fcDu2THtejBBY9GEcAPFTH0zMSI4=; b=GAi/992054V5FXPZzsyWa5p7ueKTjKeEaT8aAlz1fzNEZ2aVBfKerR2z zhYz0LrwSTybQ35ExNThc8HJEhI5PrDY/Cs8Ma20tIIRZ85O4e24CVlKl N+Hct0J3LB3pR1AIORgiFVX/9yXV+RO/XTOACf7qDkNHt3tvyf0dN/Yvm FqmMN3UR2H9oKYqDcpAjjZPSjGcqrz0bwXrLAMTiI9abWSFwcZkDkbgm2 CIayGa+LNt83Psi1rDM9hH8pp2Ylu3ylCgWULpuJZN6UHKhDiT9zztij5 WGEx/Vq2YKPZ2nLjRQghNYmgPuHnGnAAKFbbp8SWvqC88nXbMzU57DtSt A==; IronPort-SDR: zpfq2qXK0NpfqfnHXH2olt3AIp44j/AFJp7QER9hBQdU6K+FjrGvHZ5GuxT8m0r/Orm64PiMiD MVz+DGcKCvFzZHNaKc2n6m4iho3RQvKMcmu/t2rOL8N/1ruJyM0mDC/zNHhY3luVnOJ53c/H4g /BPzFMBlwuP60/WFNEybttKAQ+vHSOW3rpAGxee4+JKubuna+h1E9u4Q3CL6bccRbqnqenNHk8 BDNKPXIxAeGj46qY1bA6PGF9xCbBFlZs7slv7fbeWJ5wdtzguTraBhQXpS8cYLajX7worBgcqX RGLGyuiG57HXEKV0zrSvEDXh X-IronPort-AV: E=Sophos;i="5.88,192,1635231600"; d="scan'208";a="141843400" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2021 05:29:49 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 9 Dec 2021 05:29:49 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 9 Dec 2021 05:29:46 -0700 From: Tudor Ambarus To: , Subject: [PATCH 2/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI Date: Thu, 9 Dec 2021 14:29:39 +0200 Message-ID: <20211209122939.339810-3-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211209122939.339810-1-tudor.ambarus@microchip.com> References: <20211209122939.339810-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_042951_632277_C078270E X-CRM114-Status: UNSURE ( 7.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, alexandre.belloni@bootlin.com, Tudor Ambarus , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, ludovic.desroches@microchip.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org sama7g5 embedds 2 instances of the QSPI controller: 1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to 200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols Supported 2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to 90 MHz DDR/133 MHz SDR Signed-off-by: Tudor Ambarus Reviewed-by: Rob Herring --- .../devicetree/bindings/spi/atmel,quadspi.yaml | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml index 7d0408f53c5f..1d493add4053 100644 --- a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml +++ b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml @@ -17,6 +17,8 @@ properties: enum: - atmel,sama5d2-qspi - microchip,sam9x60-qspi + - microchip,sama7g5-qspi + - microchip,sama7g5-ospi reg: items: @@ -32,17 +34,27 @@ properties: minItems: 1 items: - description: peripheral clock - - description: system clock, if available + - description: system clock or generic clock, if available clock-names: minItems: 1 items: - const: pclk - - const: qspick + - enum: [ qspick, gclk ] interrupts: maxItems: 1 + dmas: + items: + - description: tx DMA channel + - description: rx DMA channel + + dma-names: + items: + - const: tx + - const: rx + '#address-cells': const: 1