From patchwork Thu Dec 9 12:36:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12695467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C6BBC433F5 for ; Thu, 9 Dec 2021 12:38:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qaaO5oZNk74xvWUVXHf2jMyuAqUjJLl08V8w2ttp99w=; b=Tl7WWMrsAGu/ly pcwXTLXU0gFk4PlhkkboLEPuOcWnZmfYnxaMJReaSpDQKokGTl4E/+e0W2yxycZFOtykgRYelSIby 27zLq0XOVgfTUpJ2qdXTVgzokCIDyQTv/ejfDeyf2RrZSm+H3cGlffFvQjt1vUmgrxEPQoZL+RNKn p0p1AwKJ+rVfXXv5YxlVXevI8bhyWLb8O2myu4c9fUM+L53V1pI8J1dEo0tVVhXTmxngdUZnPBoRv LTDengj6HsPlFjqtrkWvLjTR6e7smeonkqxvDGNbn+TE/JaNCStLl+/tmZjQ6gWjI+ZbLBUJj+H4r CB1SzfXa8JiK2K23oCYg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvIfR-00FxDj-4X; Thu, 09 Dec 2021 12:36:57 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvIfJ-00FxCV-Vu for linux-arm-kernel@lists.infradead.org; Thu, 09 Dec 2021 12:36:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1639053409; x=1670589409; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NPSr8y9FiBwwCRhocTr1U6r53NqUFSQijAlVpjpNkZ0=; b=Gp5x5Oj0RVFo4Cvx9NhAg2LdZ8oxbrAYwcn+m4tvq4Nw060cDVF9D+Gs RoPDBrxnKYoJV+qw53tupijVKN9I3Bs0Cd5VyXBOhfT7eUrc/kCQSzDL0 2pHZfaiEgzE1yWqxbApk/jrusPdM6kdVi3Pag9swWDxQ/zuT8P4Xmlzwp NMvLy0zNcVfj8G0TwEqsSTmGqF6QOfNn4qZ2qEUXZBRCbCyekK9hiFW/n 84TRV359Z/r4ZD6PGOlWeteC6lTC/gYTrhLoDZNqv39B4M58slgaNtook Jj8IwRFyQOcIl+MjkHVdvx5hrKKysOTnUD60nHi7S600fsiWIdWSfyG8O w==; IronPort-SDR: loKFcqvZlr1yj3YZrmUxr4w86zrkb6HtAD0/tfP7J/1QR0Un++csPCPkVCDfWzVgkgjUuQIJ+u 2eQ3A5EOg72fzk9SnTUUy1xC0wj41sM1nwBvysIDDF6cUybyn4ZBCSQ9W0qB8wWRE9MjFrzjMQ GZpGBonf+dJnc5ZM2e8kwybyc47YPJajG5cOnMkklpZYpFUYG+HeFaCR6sHYQf3De1nB+wrRSG GoscwhcQU4esydViRinslpIeen0JUvR1VNS5+X4qEsyUA+HB7eswz20+BksV6b7Yk8ajucExjb rt959Bt0jXeioMi42FTk04x6 X-IronPort-AV: E=Sophos;i="5.88,192,1635231600"; d="scan'208";a="154857927" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2021 05:36:49 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 9 Dec 2021 05:36:49 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 9 Dec 2021 05:36:47 -0700 From: Tudor Ambarus To: , CC: , , , , , Tudor Ambarus Subject: [PATCH 2/2] ARM: dts: at91: sama7g5ek: Add QSPI0 node Date: Thu, 9 Dec 2021 14:36:43 +0200 Message-ID: <20211209123643.341892-2-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211209123643.341892-1-tudor.ambarus@microchip.com> References: <20211209123643.341892-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_043650_074283_1DDD0F4E X-CRM114-Status: UNSURE ( 9.35 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org QSPI0 comunicates with a MX66LM1G45G SPI NOR flash. Enable the controller and describe the flash. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama7g5ek.dts | 73 ++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 0e1975c6812e..ccf9e224da78 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -13,6 +13,7 @@ #include "sama7g5.dtsi" #include #include +#include / { model = "Microchip SAMA7G5-EK"; @@ -134,6 +135,59 @@ &cpu0 { cpu-supply = <&vddcpu>; }; +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + m25p,fast-read; + + at91bootstrap@0 { + label = "ospi: at91bootstrap"; + reg = <0x0 0x40000>; + }; + + bootloader@40000 { + label = "ospi: bootloader"; + reg = <0x40000 0xc0000>; + }; + + bootloaderenvred@100000 { + label = "ospi: bootloader env redundant"; + reg = <0x100000 0x40000>; + }; + + bootloaderenv@140000 { + label = "ospi: bootloader env"; + reg = <0x140000 0x40000>; + }; + + dtb@180000 { + label = "ospi: device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "ospi: kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "ospi: rootfs"; + reg = <0x800000 0x7800000>; + }; + + }; +}; + &dma0 { status = "okay"; }; @@ -555,6 +609,25 @@ pinctrl_mikrobus1_spi: mikrobus1_spi { bias-disable; }; + pinctrl_qspi: qspi { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + slew-rate = <0>; + atmel,drive-strength = ; + }; + pinctrl_sdmmc0_default: sdmmc0_default { cmd_data { pinmux = ,