| Message ID | 20211209163600.609613-1-thierry.reding@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/4] dt-bindings: arm-smmu: Document nvidia, memory-controller property | expand |
On Thu, 09 Dec 2021 17:35:57 +0100, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > On NVIDIA SoC's the ARM SMMU needs to interact with the memory > controller in order to map memory clients to the corresponding stream > IDs. Document how the nvidia,memory-controller property can be used to > achieve this. > > Note that this is a backwards-incompatible change that is, however, > necessary to ensure correctness. Without the new property, most of the > devices would still work but it is not guaranteed that all will. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > Changes in v2: > - clarify why the new nvidia,memory-controller property is required > > .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
On Thu, Dec 09, 2021 at 05:35:57PM +0100, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > On NVIDIA SoC's the ARM SMMU needs to interact with the memory > controller in order to map memory clients to the corresponding stream > IDs. Document how the nvidia,memory-controller property can be used to > achieve this. > > Note that this is a backwards-incompatible change that is, however, > necessary to ensure correctness. Without the new property, most of the > devices would still work but it is not guaranteed that all will. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > Changes in v2: > - clarify why the new nvidia,memory-controller property is required > > .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) Hi Joerg, can you pick up patches 1-3 of this series? DT bindings have been reviewed by Rob and Will acked the ARM SMMU change. I can take the device tree changes (patch 4) through the Tegra tree. Thanks, Thierry
On Wed, Feb 16, 2022 at 02:25:20PM +0100, Thierry Reding wrote: > On Thu, Dec 09, 2021 at 05:35:57PM +0100, Thierry Reding wrote: > > From: Thierry Reding <treding@nvidia.com> > > > > On NVIDIA SoC's the ARM SMMU needs to interact with the memory > > controller in order to map memory clients to the corresponding stream > > IDs. Document how the nvidia,memory-controller property can be used to > > achieve this. > > > > Note that this is a backwards-incompatible change that is, however, > > necessary to ensure correctness. Without the new property, most of the > > devices would still work but it is not guaranteed that all will. > > > > Signed-off-by: Thierry Reding <treding@nvidia.com> > > --- > > Changes in v2: > > - clarify why the new nvidia,memory-controller property is required > > > > .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) > > Hi Joerg, > > can you pick up patches 1-3 of this series? DT bindings have been > reviewed by Rob and Will acked the ARM SMMU change. I can take the > device tree changes (patch 4) through the Tegra tree. Will, Robin, Joerg, I haven't seen this show up in linux-next yet but was hoping to see this go in for v5.18. Anything I can do to help this move along? Thanks, Thierry
On Tue, Mar 08, 2022 at 04:59:05PM +0100, Thierry Reding wrote: > On Wed, Feb 16, 2022 at 02:25:20PM +0100, Thierry Reding wrote: > > On Thu, Dec 09, 2021 at 05:35:57PM +0100, Thierry Reding wrote: > > > From: Thierry Reding <treding@nvidia.com> > > > > > > On NVIDIA SoC's the ARM SMMU needs to interact with the memory > > > controller in order to map memory clients to the corresponding stream > > > IDs. Document how the nvidia,memory-controller property can be used to > > > achieve this. > > > > > > Note that this is a backwards-incompatible change that is, however, > > > necessary to ensure correctness. Without the new property, most of the > > > devices would still work but it is not guaranteed that all will. > > > > > > Signed-off-by: Thierry Reding <treding@nvidia.com> > > > --- > > > Changes in v2: > > > - clarify why the new nvidia,memory-controller property is required > > > > > > .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ > > > 1 file changed, 17 insertions(+) > > > > Hi Joerg, > > > > can you pick up patches 1-3 of this series? DT bindings have been > > reviewed by Rob and Will acked the ARM SMMU change. I can take the > > device tree changes (patch 4) through the Tegra tree. > > Will, Robin, Joerg, > > I haven't seen this show up in linux-next yet but was hoping to see this > go in for v5.18. Anything I can do to help this move along? Hmm, I guess I could've taken 1-3, but after your message to Joerg I just Acked the driver change on the assumption that was a dependency or something. In any case, I'm happy for Joerg to pick these three up directly if he has time this late in the cycle. Will
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index f66a3effba73..e239157eb30c 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -155,6 +155,17 @@ properties: power-domains: maxItems: 1 + nvidia,memory-controller: + description: | + A phandle to the memory controller on NVIDIA Tegra186 and later SoCs. + The memory controller needs to be programmed with a mapping of memory + client IDs to ARM SMMU stream IDs. + + If this property is absent, the mapping programmed by early firmware + will be used and it is not guaranteed that IOMMU translations will be + enabled for any given device. + $ref: /schemas/types.yaml#/definitions/phandle + required: - compatible - reg @@ -177,6 +188,12 @@ allOf: reg: minItems: 1 maxItems: 2 + + # The reference to the memory controller is required to ensure that the + # memory client to stream ID mapping can be done synchronously with the + # IOMMU attachment. + required: + - nvidia,memory-controller else: properties: reg: