From patchwork Sun Dec 12 13:49:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 12695797 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22B6CC433F5 for ; Sun, 12 Dec 2021 13:51:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=H5JM4ElrpgJ3H7BOpHw8h67G3yiIFBLrU6MMUUBDRK8=; b=yqZGRTWpuMDQs8 rKKQR5e8lmBcRRq6H41nimxinym+IlWob1uAL98QSRhLjCuXjm+YRdeAZrMRJyqk5Sz0KpsoHstZ+ AOUoD+i2kornBj3t5cd0FKatHVvaVm6KUUYsOmTtX0E940NRegCZGuWFv8C1wPzyOLc070G/CdeYF 5wyU2pHrB2ybg/dlAlYy0/UFgzv+QrXtpu7kakWL4P4sm9T7bu1+MOC83s4WbFJOMyZCuGpKGa84a MzpsHAFsPpgG29ulLtjX11nIfJd376bTxhPa0OHQaA3GujtNDEyBaxhWuSFuayrExXyMtHc1Z4ACn sVXkrtp1LSMTArqS6KTQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mwPF2-006bCb-Us; Sun, 12 Dec 2021 13:50:17 +0000 Received: from ns.lynxeye.de ([87.118.118.114] helo=lynxeye.de) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mwPEf-006b7d-1G for linux-arm-kernel@lists.infradead.org; Sun, 12 Dec 2021 13:49:56 +0000 Received: by lynxeye.de (Postfix, from userid 501) id 3EB0DE74225; Sun, 12 Dec 2021 14:49:20 +0100 (CET) Received: from astat.fritz.box (a89-183-66-37.net-htp.de [89.183.66.37]) by lynxeye.de (Postfix) with ESMTPA id A0D7AE7420D; Sun, 12 Dec 2021 14:49:17 +0100 (CET) From: Lucas Stach To: Shawn Guo Cc: Fabio Estevam , Pengutronix Kernel Team , NXP Linux Team , linux-arm-kernel@lists.infradead.org, "Lukas F . Hartmann" Subject: [PATCH 1/3] arm64: dts: mnt-reform2: add internal display support Date: Sun, 12 Dec 2021 14:49:10 +0100 Message-Id: <20211212134912.1988208-1-dev@lynxeye.de> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211212_054953_396169_FDF4142A X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds support for the internal display of the Reform2 Laptop, which is connected to the i.MX8MQ via a MIPI-DSI->eDP bridge chip. Clocking is derived from a system PLL, which provides quite good rate matching for the single supported display mode and keeps the video PLL free for usage with the external display, which isn't supported yet. Signed-off-by: Lucas Stach --- .../boot/dts/freescale/imx8mq-mnt-reform2.dts | 139 ++++++++++++++++++ 1 file changed, 139 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts index 4f2db6197b39..b96825799f3d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts @@ -13,6 +13,30 @@ / { model = "MNT Reform 2"; compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq"; + backlight: backlight { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_backlight>; + compatible = "pwm-backlight"; + pwms = <&pwm2 0 10000>; + power-supply = <®_main_usb>; + enable-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + brightness-levels = <0 32 64 128 160 200 255>; + default-brightness-level = <6>; + }; + + panel { + compatible = "innolux,n125hce-gn1", "simple-panel"; + power-supply = <®_main_3v3>; + backlight = <&backlight>; + no-hpd; + + port { + panel_in: endpoint { + remote-endpoint = <&edp_bridge_out>; + }; + }; + }; + pcie1_refclk: clock-pcie1-refclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -41,6 +65,22 @@ reg_main_usb: regulator-main-usb { vin-supply = <®_main_5v>; }; + reg_main_1v8: regulator-main-1v8 { + compatible = "regulator-fixed"; + regulator-name = "1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <®_main_3v3>; + }; + + reg_main_1v2: regulator-main-1v2 { + compatible = "regulator-fixed"; + regulator-name = "1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <®_main_5v>; + }; + sound { compatible = "fsl,imx-audio-wm8960"; audio-cpu = <&sai2>; @@ -60,6 +100,13 @@ sound { }; }; +&dphy { + status = "okay"; + assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>; + assigned-clock-rates = <25000000>; +}; + &fec1 { status = "okay"; }; @@ -83,6 +130,66 @@ rtc@68 { }; }; +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + edp_bridge: bridge@2c { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_edp_bridge>; + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + enable-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; + vccio-supply = <®_main_1v8>; + vpll-supply = <®_main_1v8>; + vcca-supply = <®_main_1v2>; + vcc-supply = <®_main_1v2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + edp_bridge_in: endpoint { + remote-endpoint = <&mipi_dsi_out>; + }; + }; + + port@1 { + reg = <1>; + + edp_bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; +}; + +&lcdif { + status = "okay"; + assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>; + /delete-property/assigned-clock-rates; +}; + +&mipi_dsi { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + mipi_dsi_out: endpoint { + remote-endpoint = <&edp_bridge_in>; + }; + }; + }; +}; + &pcie1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie1>; @@ -95,6 +202,13 @@ &pcie1 { status = "okay"; }; +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + + ®_1p8v { vin-supply = <®_main_5v>; }; @@ -168,6 +282,18 @@ &usdhc2 { }; &iomuxc { + pinctrl_backlight: backlightgrp { + fsl,pins = < + MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x3 + >; + }; + + pinctrl_edp_bridge: edpbridgegrp { + fsl,pins = < + MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f @@ -175,12 +301,25 @@ MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f >; }; + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000022 + MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000022 + >; + }; + pinctrl_pcie1: pcie1grp { fsl,pins = < MX8MQ_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x16 >; }; + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX8MQ_IOMUXC_SPDIF_RX_PWM2_OUT 0x3 + >; + }; + pinctrl_sai2: sai2grp { fsl,pins = < MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6