From patchwork Wed Dec 15 10:58:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 12696246 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C621C433F5 for ; Wed, 15 Dec 2021 11:02:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EyxmYh2SYPRKDEXDuyYeq+VtkhmwaGuz7blNIgcVAc0=; b=ZGLTELDYYrGfGa 1JOGF1a6lFBZHDxFEskCV6ZtqF6yHcbGFz2rzp5sVs8tlAUGeU/8CcGmIa0NbVthuU7yTZhsPuisQ 8L80p9EzR4wiIrViYFOm0TvrjWlatdS7k3OAgGqJGnwqQ+MtOcHLWNWKUSe+VaNQacjl6ONs7vAn9 /mbpq5m2lBbRIi4MEpFiV1pJwpQjruICuvqSMjKQs9BQiNKzSZZPf3OnZmC8DbyRpub5yu+y7yVlO vYmGGq84ISwldRjMmZ5Z5DHblSN8CkDwxwlTSINBeuLR3vBrAKsbLviOeDYQeYVvap75LMZegiTNG +EZRM6NPhbhrjovlM7tw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mxS1N-000LlL-L6; Wed, 15 Dec 2021 11:00:30 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mxS03-000LDB-H8 for linux-arm-kernel@lists.infradead.org; Wed, 15 Dec 2021 10:59:11 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BFAOmbN014841; Wed, 15 Dec 2021 11:58:53 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=zQWkmP4ej0A5DSWCwAF/y8Xy7sc4PmpvNPei3TdmlCQ=; b=4PqLK+CcY6rD0mI6AbUMTgDmbt/9Dy41GxGhIwB4RBB+hSu53ujJt+YWP9cIWzLI9jD/ x1vU+7E0oH69W/vh+tY4leC9wHIWEac/c+9a2sT28Xj7AE6NK2e25vMYkmiwxgMwqi/t 4pkEayDg8mVVXTAlY0tD9vqH0NS0vXuUat/lgkAbudMFghG7f+3BHvG6dPhIToGnhiGO oCTG878peJdTUSxUUE/JwkYaqVvlcwc2rHuoQwjX/6ej7z4eCwCwCjfUv+jxb5cEnOR4 hP+FmPhAXOkKOsywMbZjw3IOP1Chkn1eE4h2oQ7quiHsORWwCbXsMjYm2ry8hwshGPsf Wg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3cyeka85qu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Dec 2021 11:58:53 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EDB87100034; Wed, 15 Dec 2021 11:58:52 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E4525235F6C; Wed, 15 Dec 2021 11:58:52 +0100 (CET) Received: from localhost (10.75.127.50) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Wed, 15 Dec 2021 11:58:52 +0100 From: Alexandre Torgue To: Thomas Gleixner , Marc Zyngier , Rob Herring CC: , , , , Subject: [PATCH v2 1/5] dt-bindings: interrupt-controller: Update STM32 EXTI interrupt controller Date: Wed, 15 Dec 2021 11:58:43 +0100 Message-ID: <20211215105847.2328-2-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211215105847.2328-1-alexandre.torgue@foss.st.com> References: <20211215105847.2328-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-15_08,2021-12-14_01,2021-12-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211215_025908_177541_ECDB30A1 X-CRM114-Status: GOOD ( 14.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Document new entry "st,exti-mapping" which links EXTI lines with GIC interrupt lines and add an include file to define EXTI interrupt type. Signed-off-by: Alexandre Torgue diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml index d19c881b4abc..e08bb51e97a8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml @@ -41,6 +41,17 @@ properties: description: Interrupts references to primary interrupt controller + st,exti-mapping: + $ref: "/schemas/types.yaml#/definitions/uint32-matrix" + description: | + Define mapping between EXTI lines and GIC irq lines. Should be: + st,exti-mapping = , ...; + With: + - EXTI_LINE: EXTI line number. + - GIC_IRQ: GIC IRQ associated to the EXTI line. + - EXTI_TYPE: STM32_EXTI_TYPE_CONFIGURABLE or STM32_EXTI_TYPE_DIRECT. + Defined in include/dt-bindings/interrupt-controller/stm32-exti.h + required: - "#interrupt-cells" - compatible diff --git a/include/dt-bindings/interrupt-controller/stm32-exti.h b/include/dt-bindings/interrupt-controller/stm32-exti.h new file mode 100644 index 000000000000..02b7e0e30cf7 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/stm32-exti.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_STM32_EXTI_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_STM32_EXTI_H + +#define STM32_EXTI_TYPE_CONFIGURABLE 0 +#define STM32_EXTI_TYPE_DIRECT 1 + +#define STM32_EXTI_MAPPING_CELL_NB 3 + +#endif