Message ID | 20220103074731.3651-6-avolmat@me.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Introduction of PCIe support on STi platform | expand |
Hi Alain On 1/3/22 08:47, Alain Volmat wrote: > Enable the PCIe controller with proper reset gpio pin for this board. > > Signed-off-by: Alain Volmat <avolmat@me.com> > --- > arch/arm/boot/dts/stih418-b2264.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/boot/dts/stih418-b2264.dts b/arch/arm/boot/dts/stih418-b2264.dts > index a99604bebf8c..ed183292a669 100644 > --- a/arch/arm/boot/dts/stih418-b2264.dts > +++ b/arch/arm/boot/dts/stih418-b2264.dts > @@ -130,6 +130,11 @@ &ohci1 { > status = "okay"; > }; > > +&pcie1 { > + reset-gpios = <&pio34 5 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; > + > &pwm1 { > status = "okay"; > }; Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
diff --git a/arch/arm/boot/dts/stih418-b2264.dts b/arch/arm/boot/dts/stih418-b2264.dts index a99604bebf8c..ed183292a669 100644 --- a/arch/arm/boot/dts/stih418-b2264.dts +++ b/arch/arm/boot/dts/stih418-b2264.dts @@ -130,6 +130,11 @@ &ohci1 { status = "okay"; }; +&pcie1 { + reset-gpios = <&pio34 5 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &pwm1 { status = "okay"; };
Enable the PCIe controller with proper reset gpio pin for this board. Signed-off-by: Alain Volmat <avolmat@me.com> --- arch/arm/boot/dts/stih418-b2264.dts | 5 +++++ 1 file changed, 5 insertions(+)