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[82.125.191.186]) by smtp.gmail.com with ESMTPSA id l2sm41080153pfc.42.2022.01.03.07.46.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jan 2022 07:47:00 -0800 (PST) From: Gary Bisson To: linux-amlogic@lists.infradead.org Cc: Gary Bisson , Rob Herring , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: meson-g12-common: add uart_ao_b pins muxing Date: Mon, 3 Jan 2022 16:46:16 +0100 Message-Id: <20220103154616.308376-4-gary.bisson@boundarydevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220103154616.308376-1-gary.bisson@boundarydevices.com> References: <20220103154616.308376-1-gary.bisson@boundarydevices.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220103_074701_675369_E5917E2F X-CRM114-Status: GOOD ( 10.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org - RX/TX signals can be mapped on 2 different pairs of pins so supporting both options - RTS/CTS signals however only have 1 option available Signed-off-by: Gary Bisson --- Cc: Rob Herring Cc: Neil Armstrong Cc: Kevin Hilman Cc: Jerome Brunet Cc: Martin Blumenstingl Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- .../boot/dts/amlogic/meson-g12-common.dtsi | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index af1357c48bee..3a7773ffbd08 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1952,6 +1952,33 @@ mux { }; }; + uart_ao_b_1_pins: uart-ao-b-1 { + mux { + groups = "uart_ao_b_tx_2", + "uart_ao_b_rx_3"; + function = "uart_ao_b"; + bias-disable; + }; + }; + + uart_ao_b_2_pins: uart-ao-b-2 { + mux { + groups = "uart_ao_b_tx_8", + "uart_ao_b_rx_9"; + function = "uart_ao_b"; + bias-disable; + }; + }; + + uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts { + mux { + groups = "uart_ao_b_cts", + "uart_ao_b_rts"; + function = "uart_ao_b"; + bias-disable; + }; + }; + pwm_a_e_pins: pwm-a-e { mux { groups = "pwm_a_e";