diff mbox series

[v2,2/3] dt-bindings: ARM: Mediatek: Remove vppsys in MT8195 clock document

Message ID 20220110005902.27148-3-chun-jie.chen@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Integrate vppsys with mtk-mmsys in MT8195 | expand

Commit Message

Chun-Jie Chen Jan. 10, 2022, 12:59 a.m. UTC
vppsys0 and vppsys1 sub-system are both integrated with mmsys driver,
should be describe in mediatek,mmsys.yaml

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
---
 .../arm/mediatek/mediatek,mt8195-clock.yaml      | 16 ----------------
 1 file changed, 16 deletions(-)

Comments

Rob Herring (Arm) Jan. 21, 2022, 11:35 p.m. UTC | #1
On Mon, Jan 10, 2022 at 08:59:01AM +0800, Chun-Jie Chen wrote:
> vppsys0 and vppsys1 sub-system are both integrated with mmsys driver,
> should be describe in mediatek,mmsys.yaml

Driver partitioning is not a reason to change the DT. This needs a 
better description answering why you are doing this and what are the 
implications (is this breaking the ABI?).

> 
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> ---
>  .../arm/mediatek/mediatek,mt8195-clock.yaml      | 16 ----------------
>  1 file changed, 16 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
> index 17fcbb45d121..d62d60181147 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
> @@ -28,11 +28,9 @@ properties:
>            - mediatek,mt8195-imp_iic_wrap_s
>            - mediatek,mt8195-imp_iic_wrap_w
>            - mediatek,mt8195-mfgcfg
> -          - mediatek,mt8195-vppsys0
>            - mediatek,mt8195-wpesys
>            - mediatek,mt8195-wpesys_vpp0
>            - mediatek,mt8195-wpesys_vpp1
> -          - mediatek,mt8195-vppsys1
>            - mediatek,mt8195-imgsys
>            - mediatek,mt8195-imgsys1_dip_top
>            - mediatek,mt8195-imgsys1_dip_nr
> @@ -92,13 +90,6 @@ examples:
>          #clock-cells = <1>;
>      };
>  
> -  - |
> -    vppsys0: clock-controller@14000000 {
> -        compatible = "mediatek,mt8195-vppsys0";
> -        reg = <0x14000000 0x1000>;
> -        #clock-cells = <1>;
> -    };
> -
>    - |
>      wpesys: clock-controller@14e00000 {
>          compatible = "mediatek,mt8195-wpesys";
> @@ -120,13 +111,6 @@ examples:
>          #clock-cells = <1>;
>      };
>  
> -  - |
> -    vppsys1: clock-controller@14f00000 {
> -        compatible = "mediatek,mt8195-vppsys1";
> -        reg = <0x14f00000 0x1000>;
> -        #clock-cells = <1>;
> -    };
> -
>    - |
>      imgsys: clock-controller@15000000 {
>          compatible = "mediatek,mt8195-imgsys";
> -- 
> 2.18.0
> 
>
Chun-Jie Chen Feb. 15, 2022, 9:50 a.m. UTC | #2
On Fri, 2022-01-21 at 17:35 -0600, Rob Herring wrote:
> On Mon, Jan 10, 2022 at 08:59:01AM +0800, Chun-Jie Chen wrote:
> > vppsys0 and vppsys1 sub-system are both integrated with mmsys
> > driver,
> > should be describe in mediatek,mmsys.yaml
> 
> Driver partitioning is not a reason to change the DT. This needs a 
> better description answering why you are doing this and what are the 
> implications (is this breaking the ABI?).


Due to the change in [1], vppsys0/vppsys1 are not only clock providers
and support mm system control. It's better to be described in
"mediatek,mmsys.yaml" [2] because they are not pure clock providers.

[1] 
https://patchwork.kernel.org/project/linux-mediatek/patch/20220117055254.9777-4-roy-cw.yeh@mediatek.com/
[2] 
https://patchwork.kernel.org/project/linux-mediatek/patch/20220117055254.9777-15-roy-cw.yeh@mediatek.com/

Thanks!
Best Regards,
Chun-Jie
> > 
> > Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
> > ---
> >  .../arm/mediatek/mediatek,mt8195-clock.yaml      | 16 ------------
> > ----
> >  1 file changed, 16 deletions(-)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-
> > clock.yaml
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-
> > clock.yaml
> > index 17fcbb45d121..d62d60181147 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-
> > clock.yaml
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-
> > clock.yaml
> > @@ -28,11 +28,9 @@ properties:
> >            - mediatek,mt8195-imp_iic_wrap_s
> >            - mediatek,mt8195-imp_iic_wrap_w
> >            - mediatek,mt8195-mfgcfg
> > -          - mediatek,mt8195-vppsys0
> >            - mediatek,mt8195-wpesys
> >            - mediatek,mt8195-wpesys_vpp0
> >            - mediatek,mt8195-wpesys_vpp1
> > -          - mediatek,mt8195-vppsys1
> >            - mediatek,mt8195-imgsys
> >            - mediatek,mt8195-imgsys1_dip_top
> >            - mediatek,mt8195-imgsys1_dip_nr
> > @@ -92,13 +90,6 @@ examples:
> >          #clock-cells = <1>;
> >      };
> >  
> > -  - |
> > -    vppsys0: clock-controller@14000000 {
> > -        compatible = "mediatek,mt8195-vppsys0";
> > -        reg = <0x14000000 0x1000>;
> > -        #clock-cells = <1>;
> > -    };
> > -
> >    - |
> >      wpesys: clock-controller@14e00000 {
> >          compatible = "mediatek,mt8195-wpesys";
> > @@ -120,13 +111,6 @@ examples:
> >          #clock-cells = <1>;
> >      };
> >  
> > -  - |
> > -    vppsys1: clock-controller@14f00000 {
> > -        compatible = "mediatek,mt8195-vppsys1";
> > -        reg = <0x14f00000 0x1000>;
> > -        #clock-cells = <1>;
> > -    };
> > -
> >    - |
> >      imgsys: clock-controller@15000000 {
> >          compatible = "mediatek,mt8195-imgsys";
> > -- 
> > 2.18.0
> > 
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
index 17fcbb45d121..d62d60181147 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
@@ -28,11 +28,9 @@  properties:
           - mediatek,mt8195-imp_iic_wrap_s
           - mediatek,mt8195-imp_iic_wrap_w
           - mediatek,mt8195-mfgcfg
-          - mediatek,mt8195-vppsys0
           - mediatek,mt8195-wpesys
           - mediatek,mt8195-wpesys_vpp0
           - mediatek,mt8195-wpesys_vpp1
-          - mediatek,mt8195-vppsys1
           - mediatek,mt8195-imgsys
           - mediatek,mt8195-imgsys1_dip_top
           - mediatek,mt8195-imgsys1_dip_nr
@@ -92,13 +90,6 @@  examples:
         #clock-cells = <1>;
     };
 
-  - |
-    vppsys0: clock-controller@14000000 {
-        compatible = "mediatek,mt8195-vppsys0";
-        reg = <0x14000000 0x1000>;
-        #clock-cells = <1>;
-    };
-
   - |
     wpesys: clock-controller@14e00000 {
         compatible = "mediatek,mt8195-wpesys";
@@ -120,13 +111,6 @@  examples:
         #clock-cells = <1>;
     };
 
-  - |
-    vppsys1: clock-controller@14f00000 {
-        compatible = "mediatek,mt8195-vppsys1";
-        reg = <0x14f00000 0x1000>;
-        #clock-cells = <1>;
-    };
-
   - |
     imgsys: clock-controller@15000000 {
         compatible = "mediatek,mt8195-imgsys";