| Message ID | 20220111132301.906712-1-tudor.ambarus@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] ARM: dts: at91: sama5d2: Fix PMERRLOC resource size | expand |
Hei hei, Am Dienstag, 11. Januar 2022, 14:23:01 CET schrieb Tudor Ambarus: > PMERRLOC resource size was set to 0x100, which resulted in HSMC_ERRLOCx > register being truncated to offset x = 21, causing error correction to > fail if more than 22 bit errors and if 24 or 32 bit error correction > was supported. > > Fixes: d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers") > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > Cc: <stable@vger.kernel.org> # 4.13.x Acked-by: Alexander Dahl <ada@thorsis.com> Greets Alex > --- > v2: > - update commit description > - Cc stable@vger.kernel.org > > arch/arm/boot/dts/sama5d2.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi > index 09c741e8ecb8..c700c3b19e4c 100644 > --- a/arch/arm/boot/dts/sama5d2.dtsi > +++ b/arch/arm/boot/dts/sama5d2.dtsi > @@ -415,7 +415,7 @@ hsmc: hsmc@f8014000 { > pmecc: ecc-engine@f8014070 { > compatible = "atmel,sama5d2-pmecc"; > reg = <0xf8014070 0x490>, > - <0xf8014500 0x100>; > + <0xf8014500 0x200>; > }; > };
On 11/01/2022 at 14:23, Tudor Ambarus wrote: > PMERRLOC resource size was set to 0x100, which resulted in HSMC_ERRLOCx > register being truncated to offset x = 21, causing error correction to > fail if more than 22 bit errors and if 24 or 32 bit error correction > was supported. > > Fixes: d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers") > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> > Cc: <stable@vger.kernel.org> # 4.13.x Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Even if it's a fix, as we have this bug for a long time and that we are already at rc5 of the stabilization phase, I take it in at91-dt branch for 5.18 and not in another "fixes" batch. Best regards, Nicolas > --- > v2: > - update commit description > - Cc stable@vger.kernel.org > > arch/arm/boot/dts/sama5d2.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi > index 09c741e8ecb8..c700c3b19e4c 100644 > --- a/arch/arm/boot/dts/sama5d2.dtsi > +++ b/arch/arm/boot/dts/sama5d2.dtsi > @@ -415,7 +415,7 @@ hsmc: hsmc@f8014000 { > pmecc: ecc-engine@f8014070 { > compatible = "atmel,sama5d2-pmecc"; > reg = <0xf8014070 0x490>, > - <0xf8014500 0x100>; > + <0xf8014500 0x200>; > }; > }; >
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 09c741e8ecb8..c700c3b19e4c 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -415,7 +415,7 @@ hsmc: hsmc@f8014000 { pmecc: ecc-engine@f8014070 { compatible = "atmel,sama5d2-pmecc"; reg = <0xf8014070 0x490>, - <0xf8014500 0x100>; + <0xf8014500 0x200>; }; };
PMERRLOC resource size was set to 0x100, which resulted in HSMC_ERRLOCx register being truncated to offset x = 21, causing error correction to fail if more than 22 bit errors and if 24 or 32 bit error correction was supported. Fixes: d9c41bf30cf8 ("ARM: dts: at91: Declare EBI/NAND controllers") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Cc: <stable@vger.kernel.org> # 4.13.x --- v2: - update commit description - Cc stable@vger.kernel.org arch/arm/boot/dts/sama5d2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)