diff mbox series

[9/9] arm64: dts: imx8mp: add GPU nodes

Message ID 20220119134027.2931945-10-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series i.MX8MP power-domains part 1 and GPU support | expand

Commit Message

Lucas Stach Jan. 19, 2022, 1:40 p.m. UTC
Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP.

etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
[drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 31 +++++++++++++++++++++++
 1 file changed, 31 insertions(+)

Comments

Alexander Stein Jan. 26, 2022, 1:51 p.m. UTC | #1
Am Mittwoch, 19. Januar 2022, 14:40:27 CET schrieb Lucas Stach:
> Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP.
> 
> etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
> etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
> [drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0

Unfortunately it does not work when CONFIG_DRM_ETNAVIV=m
etnaviv-gpu 38000000.gpu: model: GC0, revision: 0
etnaviv-gpu 38000000.gpu: Unknown GPU model
etnaviv-gpu 38008000.gpu: model: GC0, revision: 0
etnaviv-gpu 38008000.gpu: Unknown GPU model

When I use CONFIG_DRM_ETNAVIV=y, I get the same log message as you. It's not 
related to this patch, but I have no clue if the cause is in blk-ctrl or pgc.

I think (don't know for sure yet) my random errors on USB side are gone when 
USB drivers (PHY as well) are built-in. But I might be wrong here.

Best regards,
Alexander
Lucas Stach Feb. 7, 2022, 7:27 p.m. UTC | #2
Hi Alexander,

Am Mittwoch, dem 26.01.2022 um 14:51 +0100 schrieb Alexander Stein:
> Am Mittwoch, 19. Januar 2022, 14:40:27 CET schrieb Lucas Stach:
> > Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP.
> > 
> > etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
> > etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
> > [drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0
> 
> Unfortunately it does not work when CONFIG_DRM_ETNAVIV=m
> etnaviv-gpu 38000000.gpu: model: GC0, revision: 0
> etnaviv-gpu 38000000.gpu: Unknown GPU model
> etnaviv-gpu 38008000.gpu: model: GC0, revision: 0
> etnaviv-gpu 38008000.gpu: Unknown GPU model
> 
> When I use CONFIG_DRM_ETNAVIV=y, I get the same log message as you. It's not 
> related to this patch, but I have no clue if the cause is in blk-ctrl or pgc.

Thanks for the report. This was caused by some wrong clock handles in
the GPU and GPC nodes. Fixed in v2.

Regards,
Lucas
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index fa9dca7acc94..67cc837058d1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -922,6 +922,37 @@  eqos: ethernet@30bf0000 {
 			};
 		};
 
+		gpu3d: gpu@38000000 {
+			compatible = "vivante,gc";
+			reg = <0x38000000 0x8000>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
+				 <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>,
+				 <&clk IMX8MP_CLK_GPU_ROOT>,
+				 <&clk IMX8MP_CLK_GPU_AHB>;
+			clock-names = "core", "shader", "bus", "reg";
+			assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
+					  <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
+			assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+						 <&clk IMX8MP_SYS_PLL1_800M>;
+			assigned-clock-rates = <800000000>, <800000000>;
+			power-domains = <&pgc_gpu3d>;
+		};
+
+		gpu2d: gpu@38008000 {
+			compatible = "vivante,gc";
+			reg = <0x38008000 0x8000>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX8MP_CLK_GPU2D_CORE>,
+				 <&clk IMX8MP_CLK_GPU_ROOT>,
+				 <&clk IMX8MP_CLK_GPU_AHB>;
+			clock-names = "core", "bus", "reg";
+			assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
+			assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
+			assigned-clock-rates = <800000000>;
+			power-domains = <&pgc_gpu2d>;
+		};
+
 		gic: interrupt-controller@38800000 {
 			compatible = "arm,gic-v3";
 			reg = <0x38800000 0x10000>,