From patchwork Fri Jan 21 19:35:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 12720160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E23DEC433EF for ; Fri, 21 Jan 2022 19:37:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ysneKJnSmhlhc5iUEKk6+e9TngmFxlRDlmzfBqmURB0=; b=xu6Sx6j0lI2Xbd 4hNMVelbfariO59+A1hBlHJRI2MNuSt9JjSoe9/8XGBjmX2vymlVl0O2da5+/vuymewymNJVEqx3i wj1dyM/w4K6MUsbtQULJhLltFMPdAY5j9MUNvZlJjleduhoyscLLniEXaMXMgqy0QNziGyZgMmZ4w OtXsxGnZAj3ZHwtzGqpejQ60N/fyl9SPfhBKUiBi3VRopyhp9V2nBzNdGOX9VgyveHSnz2qLXEtfW 7WoVUvPvIHkhtFNAQjypmSdvPoaGCccyeUjTEY9cGvn52xO2mpsjxLMCH2rRt4U2Xb/ymyDj4ilcj G5p19dS5tq9pXoofY5Aw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAzhf-00Fw6I-6E; Fri, 21 Jan 2022 19:36:07 +0000 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAzhS-00Fw18-2w for linux-arm-kernel@lists.infradead.org; Fri, 21 Jan 2022 19:35:55 +0000 Received: by mail-wm1-x331.google.com with SMTP id n8so18803850wmk.3 for ; Fri, 21 Jan 2022 11:35:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JQsJN7pJU0BMJyEgmIQu4kyCp2vR66DlJR8TnVMAcyQ=; b=q44HUq6w2KiYoMvHttu5w86WGdLVEIS0Ai7y8an10oGs3eaMf86rF9MbcxY7Gpy/f0 ZfsOC6HI0O7ZIK9/sB0stqNjrC2oH7h10PkQnfYIOUGvvGmg8ofXDI/iR4jiyoq4oygn FfAtrXGB8sLS7QGi+oVm5M1xaX67WORdIfvrNMfVvl+oZz8X0PS3rIE3yjUXMJxel8K8 Zlbbtefde24UKEEab0ncyT88YogLhQ8vxJuJcmgSxpBXs377ynfUfBZaUqrnBfq3wXuk 6qrgsJ8i6SjEA0L1UxAqRtChUsV0xAojzgQoIraHMpzBGPdZzuPhsFrpmbzIRbH4IgoH ZoTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JQsJN7pJU0BMJyEgmIQu4kyCp2vR66DlJR8TnVMAcyQ=; b=20Vb9QSFE78LeOtRZDfLZlnsd0Hr8fYnA6cqWbla+x1zjnn/FV6hEUFdaeYThHOf06 PYoKl083X5MI8AsQsj0cpBiCafplXeimOKL/2xpgm55aCig3Xeler7gR1M5GQk8OZVB1 47OtAhjAGLS2VKG7bSJ9upRXKD0RCmI9CUnrp3KqcdqyiOj4NU6igwBGsBhiA10CtXUY SdV0y/YEzeHTs7eWQIuya+kEGU+WHr6xogTze6Asrjnu59Zt1G1QTzaAUaH5I3Cqsnm7 5KMG9GpXf+iQhpsIuvZnkpYtjqlIqpsCy0zsJbpWYHz6G9myh/EsUBEk/zGKOBNlGzHE SL4Q== X-Gm-Message-State: AOAM533iXPT1NeAOm1DbaWGcr9iNoG4svb7dKpv4QwiAdzUQKNl5lkn5 zV63QvFvZduGSjvoFC8ZH/kH15PDjwl6tw== X-Google-Smtp-Source: ABdhPJy74/M/l9l60yzDFsAdVmnA+Bxt582Pt24ra8TkTCnRoeglEPeKLr6FE1ypAg5zoVb6hpA0aA== X-Received: by 2002:a1c:984a:: with SMTP id a71mr2004193wme.115.1642793750322; Fri, 21 Jan 2022 11:35:50 -0800 (PST) Received: from debby ([2a01:e0a:a6d:a8d0:7ff4:8f61:5574:9f95]) by smtp.gmail.com with ESMTPSA id a18sm6944790wrw.5.2022.01.21.11.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 11:35:49 -0800 (PST) From: Romain Perier To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Arnd Bergmann , Daniel Palmer , Romain Perier , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v3 1/9] dt-bindings: clk: mstar msc313 cpupll binding description Date: Fri, 21 Jan 2022 20:35:36 +0100 Message-Id: <20220121193544.23231-2-romain.perier@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121193544.23231-1-romain.perier@gmail.com> References: <20220121193544.23231-1-romain.perier@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220121_113554_153802_C99F600B X-CRM114-Status: GOOD ( 14.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Daniel Palmer Add a binding description for the MStar/SigmaStar CPU PLL block. Signed-off-by: Daniel Palmer Reviewed-by: Rob Herring --- .../bindings/clock/mstar,msc313-cpupll.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml diff --git a/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml b/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml new file mode 100644 index 000000000000..a9ad7ab5230c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar/Sigmastar MSC313 CPU PLL + +maintainers: + - Daniel Palmer + +description: | + The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable + PLL that can be used as the clock source for the CPU(s). + +properties: + compatible: + const: mstar,msc313-cpupll + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - reg + +additionalProperties: false + +examples: + - | + #include + cpupll: cpupll@206400 { + compatible = "mstar,msc313-cpupll"; + reg = <0x206400 0x200>; + #clock-cells = <1>; + clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; + };