From patchwork Tue Jan 25 19:20:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ali Saidi X-Patchwork-Id: 12724184 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4BFEC433EF for ; Tue, 25 Jan 2022 19:35:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wcb6sIcfOtelZd30zHUCSoVXWV6bR3PHoRv18/zoPlg=; b=zFt5UuaSswxz+c zRrNI2of0jnRoAi2K1BGN+vR7+b5Lpcby7KuurVt5FpkFAGA9GITy3P+L4n0a9JEXKh2RxLALwj14 gLXQFm+tKrgXzpohLWU4mrRD+10PV0TZfd/b+st5MwZ5U/ghK6kxIilmDnLyIMQIoNuDsNjHzBZJx s0pxCXC9hCpTrXKxJSk90MBRrpE4mn0/80j++DGEevZw9dplBqucCuaFHpa9hw8k8GiKI+CqXP4at VJ0V7dJ/vT2sjW4RMalBZVhivfpqxNf5mcghDJKQwptiFpwG8U/tGiR42e/j/8c4YtZrSIbRk74QD 6fM+APZRK2693JOrpkhw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCRac-009LUa-Hh; Tue, 25 Jan 2022 19:34:50 +0000 Received: from smtp-fw-2101.amazon.com ([72.21.196.25]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCRaY-009LTD-A5 for linux-arm-kernel@lists.infradead.org; Tue, 25 Jan 2022 19:34:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1643139286; x=1674675286; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NAvOTNs9bwZgrhJlwLaHAnqjrea7JZaYZR3NRB0BhzQ=; b=ruGGS1lezzYQCKsFnKdrzrRC/GU/eDT59EE949uogWFxe1cVVZFzfTlI jxbqilmABN8ko7iemPkjmvRprY0Fzkf6QsEvdya6NjeT/Pcv3kjh73SkU yZCK5A3eP/LkDxUY1wgnvfxlsvVZHnzog6ScJkp2hKZ6Fb/o3Itd8clUC c=; X-IronPort-AV: E=Sophos;i="5.88,315,1635206400"; d="scan'208";a="168477491" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO email-inbound-relay-pdx-2b-31df91b1.us-west-2.amazon.com) ([10.43.8.2]) by smtp-border-fw-2101.iad2.amazon.com with ESMTP; 25 Jan 2022 19:34:43 +0000 Received: from EX13MTAUWB001.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan2.pdx.amazon.com [10.236.137.194]) by email-inbound-relay-pdx-2b-31df91b1.us-west-2.amazon.com (Postfix) with ESMTPS id B0A7141860; Tue, 25 Jan 2022 19:34:42 +0000 (UTC) Received: from EX13D02UWB003.ant.amazon.com (10.43.161.48) by EX13MTAUWB001.ant.amazon.com (10.43.161.207) with Microsoft SMTP Server (TLS) id 15.0.1497.28; Tue, 25 Jan 2022 19:34:33 +0000 Received: from EX13MTAUEA002.ant.amazon.com (10.43.61.77) by EX13D02UWB003.ant.amazon.com (10.43.161.48) with Microsoft SMTP Server (TLS) id 15.0.1497.28; Tue, 25 Jan 2022 19:34:33 +0000 Received: from dev-dsk-alisaidi-i31e-9f3421fe.us-east-1.amazon.com (10.200.138.153) by mail-relay.amazon.com (10.43.61.169) with Microsoft SMTP Server id 15.0.1497.28 via Frontend Transport; Tue, 25 Jan 2022 19:34:33 +0000 Received: by dev-dsk-alisaidi-i31e-9f3421fe.us-east-1.amazon.com (Postfix, from userid 5131138) id 4B27421E70; Tue, 25 Jan 2022 19:34:33 +0000 (UTC) From: Ali Saidi To: , , CC: , , Peter Zijlstra , Ingo Molnar , "Arnaldo Carvalho de Melo" , Mark Rutland , "Alexander Shishkin" , Jiri Olsa , Namhyung Kim , John Garry , "Will Deacon" , Mathieu Poirier , "Leo Yan" , James Clark , German Gomez , Andrew Kilroy Subject: [PATCH 2/2] perf arm-spe: Parse more SPE fields and store source Date: Tue, 25 Jan 2022 19:20:10 +0000 Message-ID: <20220125192016.20538-3-alisaidi@amazon.com> X-Mailer: git-send-email 2.24.4.AMZN In-Reply-To: <20220125192016.20538-1-alisaidi@amazon.com> References: <20220125192016.20538-1-alisaidi@amazon.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220125_113446_543105_0DE3814E X-CRM114-Status: GOOD ( 15.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Decode more SPE events and op types to allow for processing by perf scripts. For example looking for branches which may indicate candidates for conversion to a CSEL, store exclusives that are candidates for conversion to LSE atomics and record the source information for memory ops. Signed-off-by: Ali Saidi --- .../util/arm-spe-decoder/arm-spe-decoder.c | 18 ++++++++++++++++++ .../util/arm-spe-decoder/arm-spe-decoder.h | 8 ++++++++ 2 files changed, 26 insertions(+) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index 5e390a1a79ab..177bac0f7128 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -191,6 +191,20 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) decoder->record.op = ARM_SPE_ST; else decoder->record.op = ARM_SPE_LD; + if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) { + if (payload & SPE_OP_PKT_AT) + decoder->record.op |= ARM_SPE_LDST_ATOMIC; + if (payload & SPE_OP_PKT_EXCL) + decoder->record.op |= ARM_SPE_LDST_EXCL; + if (payload & SPE_OP_PKT_AR) + decoder->record.op |= ARM_SPE_LDST_ACQREL; + } + } else if (idx == SPE_OP_PKT_HDR_CLASS_BR_ERET) { + decoder->record.op = ARM_SPE_BR; + if (payload & SPE_OP_PKT_COND) + decoder->record.op |= ARM_SPE_BR_COND; + if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload)) + decoder->record.op |= ARM_SPE_BR_IND; } break; case ARM_SPE_EVENTS: @@ -218,8 +232,12 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) if (payload & BIT(EV_MISPRED)) decoder->record.type |= ARM_SPE_BRANCH_MISS; + if (payload & BIT(EV_NOT_TAKEN)) + decoder->record.type |= ARM_SPE_BR_NOT_TAKEN; + break; case ARM_SPE_DATA_SOURCE: + decoder->record.source = payload; break; case ARM_SPE_BAD: break; diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h index 69b31084d6be..113e427afe99 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h @@ -22,11 +22,18 @@ enum arm_spe_sample_type { ARM_SPE_TLB_MISS = 1 << 5, ARM_SPE_BRANCH_MISS = 1 << 6, ARM_SPE_REMOTE_ACCESS = 1 << 7, + ARM_SPE_BR_NOT_TAKEN = 1 << 8, }; enum arm_spe_op_type { ARM_SPE_LD = 1 << 0, ARM_SPE_ST = 1 << 1, + ARM_SPE_LDST_EXCL = 1 << 2, + ARM_SPE_LDST_ATOMIC = 1 << 3, + ARM_SPE_LDST_ACQREL = 1 << 4, + ARM_SPE_BR = 1 << 5, + ARM_SPE_BR_COND = 1 << 6, + ARM_SPE_BR_IND = 1 << 7, }; struct arm_spe_record { @@ -40,6 +47,7 @@ struct arm_spe_record { u64 virt_addr; u64 phys_addr; u64 context_id; + u16 source; }; struct arm_spe_insn;