From patchwork Wed Jan 26 17:55:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 12725572 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AE74C2BA4C for ; Wed, 26 Jan 2022 18:06:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ysneKJnSmhlhc5iUEKk6+e9TngmFxlRDlmzfBqmURB0=; b=Tfsp4TcOmqR68R 22UerX5pM+LeeocQ5cxWOTA7d8iK/RjytnhZMvnGvmm9cPPbMvqKANgwQH8tcqjZKyAeLIPL/6O/Q rhBLsRiweuZFT3wSaE9389s/tiTv0103Ho8lxsfZ2i3J1w7k9fWi87rO+K2th5Ot/VM9ELea12QLv lGRT9Hk5otueSKBAGGionJDOvAFnEyD7i1LGE4XJoiAyhNm36hU8a5wXGkTtiSn09Bzydpxkkmyfh vYVU4G8SN/S0FbeCZdXGnqyBwXlY1vvhxzaCzU7uT6pDZm5ILsnm0KySfEq+SIb8Ai44ihDdxkKfw xRl1gyuKn/UAquYP2B0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCmf0-00DDmF-7W; Wed, 26 Jan 2022 18:04:47 +0000 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCmWl-00DABr-Ih for linux-arm-kernel@lists.infradead.org; Wed, 26 Jan 2022 17:56:18 +0000 Received: by mail-wr1-x42c.google.com with SMTP id m14so169574wrg.12 for ; Wed, 26 Jan 2022 09:56:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JQsJN7pJU0BMJyEgmIQu4kyCp2vR66DlJR8TnVMAcyQ=; b=TOQ67iGAT+7+07uNizB8BHdh7jMFRMf/l+pHtOhq2S77YS6VBRszqhcfC+kZOKGRat FDU9kMMTLJivAE7oOHzbCf3euJ2eoS9POx7iSbAzJejOKGfziBKQRm6/eN6yJtZ4JjNx vFgbZP4cgzgnYWq/BcN/VYm47yo6rxWa8EBNCagRH9Zeez4Ck3kKyQe/99aLWlPEXK7K +iBbCm9PFe18TWp3b9s5HkZCH8UCGMUa97bJMgBHMHfT5mCYlcVDpNqdlfb670pi5qHd APrtuHWtdxvmhEDMDFPhiZMxqvLc2XOVGjn53ZbCOx5hVQ1scgGYJ5JbuWeyyEKooKcB oUlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JQsJN7pJU0BMJyEgmIQu4kyCp2vR66DlJR8TnVMAcyQ=; b=rrwH+zv4iC8jHwcoIM8MiOfO5rDRYbKGjj7QppBLtgDJ5EYF+jQhQMl5RoO4wmYYgl Ts+PWpgtQgbV3XJMziHcdvvU46R/I0qt19tQno8L2jIymUvhxsmOhS/e8ZRUmtsPva19 l0utJWaz4dgmUnkd5rQMK8ga4pZPiVEVJZgnHUm3r36I5luUisusgzI5aZFDHeivq7dl miUC8LG/lJ2IFaHoby4K6afkmYE370kfxx1D6eYUzlD1uLqeaoDvCBzlYLzgdcKH6geb Zi6fON1K7U9QTXj86eWl+aAeLX61atGVDfIP3MvoRD2RvqI6P4KDkwoidcyn+PEjPkY5 7NlA== X-Gm-Message-State: AOAM5316CaIErwfJItRnXnFz+hIEZZmNsuoQx/84IZR0MeW6CPhY/fKh 4C4TUnPYtJPgAfwy0idgBf4= X-Google-Smtp-Source: ABdhPJx2eb5nlXZaKrsfJpJ+W8WqvxfydVOT6cwaVmM5rRae+FOQ+xqg8ALAfHShxVhcl4JknstmdQ== X-Received: by 2002:a5d:610f:: with SMTP id v15mr23005925wrt.139.1643219773519; Wed, 26 Jan 2022 09:56:13 -0800 (PST) Received: from debby ([2a01:e0a:a6d:a8d0:7ff4:8f61:5574:9f95]) by smtp.gmail.com with ESMTPSA id m2sm4072416wmq.35.2022.01.26.09.56.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jan 2022 09:56:13 -0800 (PST) From: Romain Perier To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Arnd Bergmann , Daniel Palmer , Romain Perier , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH v4 1/8] dt-bindings: clk: mstar msc313 cpupll binding description Date: Wed, 26 Jan 2022 18:55:57 +0100 Message-Id: <20220126175604.17919-2-romain.perier@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220126175604.17919-1-romain.perier@gmail.com> References: <20220126175604.17919-1-romain.perier@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220126_095615_700163_92CD9E4C X-CRM114-Status: GOOD ( 14.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Daniel Palmer Add a binding description for the MStar/SigmaStar CPU PLL block. Signed-off-by: Daniel Palmer Reviewed-by: Rob Herring --- .../bindings/clock/mstar,msc313-cpupll.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml diff --git a/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml b/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml new file mode 100644 index 000000000000..a9ad7ab5230c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar/Sigmastar MSC313 CPU PLL + +maintainers: + - Daniel Palmer + +description: | + The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable + PLL that can be used as the clock source for the CPU(s). + +properties: + compatible: + const: mstar,msc313-cpupll + + "#clock-cells": + const: 1 + + clocks: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - "#clock-cells" + - clocks + - reg + +additionalProperties: false + +examples: + - | + #include + cpupll: cpupll@206400 { + compatible = "mstar,msc313-cpupll"; + reg = <0x206400 0x200>; + #clock-cells = <1>; + clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; + };