From patchwork Wed Jan 26 17:56:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 12725579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E6EAC28CF5 for ; Wed, 26 Jan 2022 18:10:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0HAnhOr1C8kZUcuAsp+pkbawOMp8KFRP/SE9rsUts7E=; b=lUeiqv0yvpqp6X 8x1YevpkhY4140sZUdUpkJkREpMt6ZCcXUL5eKtenIqf+C2KFCA91WmbebGsaX5BxLTR+kPHr+FvT rODI3UjF5hTyYe6VaakorQBfd4xvfH5aDuZ+KbuKutDmAWgzWpYqxjwxdtEURC3NLG6txi6UY6nfZ JUOGNZktUCTbBdPGZAoA3ripxgxQ0nuq/u/NLvXS5AK3qUiOzAh7WBv7XLl5Oz8sGJneW/bEOs35b u/RxUMQVo96MhaMjmnU7Oepx99cxlJpxVQ9CN4+/TYvYqNsY08g/YW1sKf2H8EPVntpEUS7Z+JPyj bMOQcSJuyPgsgMBZ9seA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCmie-00DFFV-RM; Wed, 26 Jan 2022 18:08:33 +0000 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nCmWs-00DAF5-3P for linux-arm-kernel@lists.infradead.org; Wed, 26 Jan 2022 17:56:23 +0000 Received: by mail-wm1-x32f.google.com with SMTP id q141-20020a1ca793000000b00347b48dfb53so359674wme.0 for ; Wed, 26 Jan 2022 09:56:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YbbfYaxNXJjiNo8O6xmEfb2M0Ik6NihxDDvfwKnfopE=; b=LLbJQvi+fx8IkX14ezqcJmTTKm1B3+EKjhaD/fKavWP4YIT5w+OIlgUqgouf09gROv eTCkFvChgj2vYIN+H2LbJh1XMa3gCZT5U3VeXFwvvp8W3QEiBlAXf1uJbGwrB7IOgu2G TPDTU45uGhS8eoy2095OIN+S7KLNXNmvNdhBjqVQL1PxwBTML4SUADU//0yXRw2NHAdO DmCuRNMMxGTrD2zWP40nvf5KOkwreYz3iI7Qh2AJwSzYtefrm7h+zbAk0XoiKzOMkPwU vB/LhfmBJLHEWVEU7ZpZv2BK0uORZq897AQ1Rbxnw7L3JZG2Bavd55l237TbMvWhvyvj 39RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YbbfYaxNXJjiNo8O6xmEfb2M0Ik6NihxDDvfwKnfopE=; b=T1k7BTVLUfLa9asijm4f7mM47KOcP/ycu0LmfHLWu/rOKDpyRT9l3Dy70pmnOtjBgl 2zgwT2faLIMC6gRXcasw/Wh9cGB1NofjGutgsvwkIA2pduYsZvAm1He3xjtbEezAIGye Gy6o2FTDs/OaGOjmp+eaCHfz0803NW3tcNGa2fZne4CmBrajHpqFlwpSOtS53fAKRkOW fijttP7KXbAlJpcRKtODchlJzlIYnZR0vee4pD76lr/MSmDzA2pFeGAxLTq8lLllkYg8 AdqakKIyb/uE/inC4/HtYKkjNlRT5gqdEm3Khye5t4QGgdda5D9PSmSJTWXdrcaCh4UH EV7Q== X-Gm-Message-State: AOAM5316h3UECf2nWiUHrsfHCiLqHS4YOXgv6STUMT+KiVhDqDKyVLua 2xkVCozrrGYPXqeacdkXpDo= X-Google-Smtp-Source: ABdhPJyBNh0xEqsTSW37ZhKBR1IOZtVGY211ApiFMYBC1fYxhO0v5UJvpml8Lc7sVcNj/31SGIzgBQ== X-Received: by 2002:a05:600c:2245:: with SMTP id a5mr8052798wmm.8.1643219780052; Wed, 26 Jan 2022 09:56:20 -0800 (PST) Received: from debby ([2a01:e0a:a6d:a8d0:7ff4:8f61:5574:9f95]) by smtp.gmail.com with ESMTPSA id u3sm10515371wrs.55.2022.01.26.09.56.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jan 2022 09:56:19 -0800 (PST) From: Romain Perier To: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Arnd Bergmann , Daniel Palmer , Romain Perier , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Willy Tarreau Subject: [PATCH v4 7/8] ARM: mstar: Add OPP table for infinity3 Date: Wed, 26 Jan 2022 18:56:03 +0100 Message-Id: <20220126175604.17919-8-romain.perier@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220126175604.17919-1-romain.perier@gmail.com> References: <20220126175604.17919-1-romain.perier@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220126_095622_191539_D8DAE232 X-CRM114-Status: GOOD ( 11.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Daniel Palmer The infinity3 has a slightly higher max frequency compared to the infinity so extend the OPP table. Co-authored-by: Willy Tarreau Signed-off-by: Daniel Palmer Reviewed-by: Romain Perier --- arch/arm/boot/dts/mstar-infinity3.dtsi | 58 ++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm/boot/dts/mstar-infinity3.dtsi b/arch/arm/boot/dts/mstar-infinity3.dtsi index 9857e2a9934d..a56cf29e5d82 100644 --- a/arch/arm/boot/dts/mstar-infinity3.dtsi +++ b/arch/arm/boot/dts/mstar-infinity3.dtsi @@ -6,6 +6,64 @@ #include "mstar-infinity.dtsi" +&cpu0_opp_table { + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + }; + + // overclock frequencies below, shown to work fine up to 1.3 GHz + opp-108000000 { + opp-hz = /bits/ 64 <1080000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1188000000 { + opp-hz = /bits/ 64 <1188000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1350000000 { + opp-hz = /bits/ 64 <1350000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1458000000 { + opp-hz = /bits/ 64 <1458000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <300000>; + turbo-mode; + }; +}; + &imi { reg = <0xa0000000 0x20000>; };