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[98.233.193.225]) by smtp.gmail.com with ESMTPSA id n2sm483389qti.59.2022.01.26.17.00.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Jan 2022 17:00:29 -0800 (PST) From: Peter Geis To: Rob Herring , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: rockchip: add Quartz64-A pmu_io_domains Date: Wed, 26 Jan 2022 20:00:22 -0500 Message-Id: <20220127010023.3169415-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220127010023.3169415-1-pgwipeout@gmail.com> References: <20220127010023.3169415-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220126_170030_772539_E9A36B3C X-CRM114-Status: GOOD ( 11.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Several io power domains on the Quartz64-A operate at 1.8v. Add the pmu_io_domains definition to enable support for this. This permits the enablement of the following features: sdio - wifi support sdhci - mmc-hs200-1_8v Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index d9eb92d59099..33c2c18caaa9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -482,6 +482,19 @@ vcc_sd_h: vcc-sd-h { }; }; +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + &sdhci { bus-width = <8>; mmc-hs200-1_8v;