| Message ID | 20220130145116.88406-12-nbd@nbd.name (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for Airoha EN7523 SoC | expand |
On Sun, Jan 30, 2022 at 3:54 PM Felix Fietkau <nbd@nbd.name> wrote: > > From: John Crispin <john@phrozen.org> > > Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 > GPIOs > > Reviewed-by: Linus Walleij <linus.walleij@linaro.org> > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: John Crispin <john@phrozen.org> > Signed-off-by: Felix Fietkau <nbd@nbd.name> > --- > .../bindings/gpio/airoha,en7523-gpio.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml b/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml > new file mode 100644 > index 000000000000..66c00ec85731 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/airoha,en7523-gpio.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Airoha EN7523 GPIO controller > + > +maintainers: > + - John Crispin <john@phrozen.org> > + > +description: | > + Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 > + GPIOs. > + > +properties: > + $nodename: > + pattern: "^gpio@[0-9a-f]+$" > + > + compatible: > + items: > + - const: airoha,en7523-gpio > + > + reg: > + description: | > + The first tuple points to the input register. > + The second and third tuple point to the direction registers > + The fourth tuple points to the output register > + maxItems: 4 > + > + "#gpio-cells": > + const: 2 > + > + gpio-controller: true > + > +required: > + - compatible > + - reg > + - "#gpio-cells" > + - gpio-controller > + > +additionalProperties: false > + > +examples: > + - | > + gpio0: gpio@1fbf0200 { > + compatible = "airoha,en7523-gpio"; > + reg = <0x1fbf0204 0x4>, > + <0x1fbf0200 0x4>, > + <0x1fbf0220 0x4>, > + <0x1fbf0214 0x4>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + gpio1: gpio@1fbf0270 { > + compatible = "airoha,en7523-gpio"; > + reg = <0x1fbf0270 0x4>, > + <0x1fbf0260 0x4>, > + <0x1fbf0264 0x4>, > + <0x1fbf0278 0x4>; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + I removed this unnecessary newline when applying. > +... > -- > 2.32.0 (Apple Git-132) > Queued for next, thanks! Bart
diff --git a/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml b/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml new file mode 100644 index 000000000000..66c00ec85731 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/airoha,en7523-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha EN7523 GPIO controller + +maintainers: + - John Crispin <john@phrozen.org> + +description: | + Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 + GPIOs. + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + items: + - const: airoha,en7523-gpio + + reg: + description: | + The first tuple points to the input register. + The second and third tuple point to the direction registers + The fourth tuple points to the output register + maxItems: 4 + + "#gpio-cells": + const: 2 + + gpio-controller: true + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +examples: + - | + gpio0: gpio@1fbf0200 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0204 0x4>, + <0x1fbf0200 0x4>, + <0x1fbf0220 0x4>, + <0x1fbf0214 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@1fbf0270 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0270 0x4>, + <0x1fbf0260 0x4>, + <0x1fbf0264 0x4>, + <0x1fbf0278 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + +...