From patchwork Mon Feb 7 03:24:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12736802 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0353C433EF for ; Mon, 7 Feb 2022 03:25:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UeF10XHaZaOmOuHc0h7Xv+fodifPJKajjMGn0/8cNY4=; b=zq2HIY/+/U2pCn tLtJ8Vk4AXMefu8gzybBiCzj1eS47o10Zwv4gLfFdDuSsszp0EFAPeBwkwKMBI00VnFWUyBBVRf00 S9LyZB37RyG+pG/FMiElexmjOjSm6BwlN9m3Vi119CZ5liPBwBhGRPnHo1o62/XapjEfkeyKY0VcG yRxzjr7JXaCXXiyxWqeilmpn5D2MUNmN3Nz4rnhgib5Ldq68ZeXzEzzD+MyWx/dlusbAn7I6zkkvu nAvUUrD6b6aoaaQmkNwRy5+++AkSAdMKW/ai97lTVlCjpI6HfgeIdiW6JFEx/8f38NVoMZPXOB8Yl bY2dTGSuF0p1pLchN2pQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nGude-008wDp-04; Mon, 07 Feb 2022 03:24:26 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nGudT-008wC7-HX for linux-arm-kernel@lists.infradead.org; Mon, 07 Feb 2022 03:24:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1644204255; x=1675740255; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hfZXbSjfHN2zhkIvf0MRCwkDTCAF9Wzn7xDTBknnhxM=; b=nC7tEVIwh+hPRv33OzBFtarIT//WUkQjfGS+DrciZb2pPDIAea7B4as0 0gkDBCNWtLg+jjm5bHXr1sl+ieH58GPbR82N+jGbZrRh/yCchOd+ZMeW6 /ojuU9JTKpxJHtZa6JDGwwzC52/XUgyF8whXnTlqS7US89X7dja8Q4BcW Gr7zLoFHqVNcm5tysQ1OFz7yyD6lj3bbfcxXbD+IaOL9kFEt5fqyrlBoq KEQBGteuaac5Ta6URpYevEv0DLtdPIWbwy4yX3tjUUCbPD4CdM9xw8g6Q 6s8zO2OQi73XTIlE9LyhDxLtdDFTStiIcoAZTIQWx+b8+4Q/5s9i9zmvF A==; IronPort-SDR: Z0NKONyjhiP0NRGdxtzlnVgQlI/yJXBEkOity4WjdOUXrp3too4yqNoOL9DGICI2+gQQ2sS4Zu HLMQd6IaON+NLpHYfveVtcmnaT9vNSDgS3afxWuzQ0Qbx95gJ/LF8dwssl4JBARP3ozI7xvcjl O6f0rVpGH0bKaXBF6KX2Pbt+cNER44xJBsQbQ7HoLsrN9QTuXh6Xx/XIpHlIMTRUK3mT1D+oZt NUWnYS81t8BiswooFkDKgD4xlK9ndJ1t8o16JsvLZcLU0rDJaX63W0hWGxb+N5mNm5wUFwVl9H g3fmo7wBY1fhPATfL/9FNv6y X-IronPort-AV: E=Sophos;i="5.88,348,1635231600"; d="scan'208";a="147803309" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Feb 2022 20:24:13 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Sun, 6 Feb 2022 20:24:12 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Sun, 6 Feb 2022 20:24:10 -0700 From: Tudor Ambarus To: , Subject: [PATCH 1/3] dt-bindings: crypto: Convert Atmel AES to yaml Date: Mon, 7 Feb 2022 05:24:03 +0200 Message-ID: <20220207032405.70733-2-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220207032405.70733-1-tudor.ambarus@microchip.com> References: <20220207032405.70733-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220206_192415_668761_9E59541E X-CRM114-Status: GOOD ( 13.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, alexandre.belloni@bootlin.com, Tudor Ambarus , linux-kernel@vger.kernel.org, davem@davemloft.net, linux-crypto@vger.kernel.org, claudiu.beznea@microchip.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert Atmel AES documentation to yaml format. With the conversion the clock and clock-names properties are made mandatory. The driver returns -EINVAL if "aes_clk" is not found, reflect that in the bindings and make the clock and clock-names properties mandatory. Update the example to better describe how one should define the dt node. Signed-off-by: Tudor Ambarus --- .../devicetree/bindings/crypto/atmel,aes.yaml | 65 +++++++++++++++++++ .../bindings/crypto/atmel-crypto.txt | 20 ------ 2 files changed, 65 insertions(+), 20 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/atmel,aes.yaml diff --git a/Documentation/devicetree/bindings/crypto/atmel,aes.yaml b/Documentation/devicetree/bindings/crypto/atmel,aes.yaml new file mode 100644 index 000000000000..f77ec04dbabe --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/atmel,aes.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/atmel,aes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator + +maintainers: + - Tudor Ambarus + +properties: + compatible: + const: atmel,at91sam9g46-aes + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: aes_clk + + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + aes: aes@f8038000 { + compatible = "atmel,at91sam9g46-aes"; + reg = <0xe1810000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; + clock-names = "aes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + status= "okay"; + }; diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt index f2aab3dc2b52..1353ebd0dcaa 100644 --- a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt +++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt @@ -2,26 +2,6 @@ These are the HW cryptographic accelerators found on some Atmel products. -* Advanced Encryption Standard (AES) - -Required properties: -- compatible : Should be "atmel,at91sam9g46-aes". -- reg: Should contain AES registers location and length. -- interrupts: Should contain the IRQ line for the AES. -- dmas: List of two DMA specifiers as described in - atmel-dma.txt and dma.txt files. -- dma-names: Contains one identifier string for each DMA specifier - in the dmas property. - -Example: -aes@f8038000 { - compatible = "atmel,at91sam9g46-aes"; - reg = <0xf8038000 0x100>; - interrupts = <43 4 0>; - dmas = <&dma1 2 18>, - <&dma1 2 19>; - dma-names = "tx", "rx"; - * Triple Data Encryption Standard (Triple DES) Required properties: