From patchwork Tue Feb 8 10:49:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12738465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C477C433F5 for ; Tue, 8 Feb 2022 10:51:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4PvSLb6BfrwpTSJ2ZJ22jEE42ag3alhsV0LMwepp9zI=; b=bk6JUWwbyMsWeG vIw/j8UOVnU0uRDhP+AfYV+G+gao/h/GYZA+CvhBoNanWelbmekbIoZAJaSQmiQk9snwfEWMbiHCq 323Bps6F77SPGTDBm2+ebLWAwB5fT0xFgjyuOisyhaNMAO5MjQECjV/lXUK3dqjCUrmowISn6w6aM MFNJiHk4IXW1IZjgofLBkBoRcE7oahGakPAe9Mng0Ip9dk9NB/i2nOJwq9DGs3UU8TAlc5d2qd8eN RzVfUq0AkdNqbra7XCTt3q71b4MGXAgmRWxt32NtdHxnfYiTKI7OKhFrgxscz/K+2vx2oRiZl5Ir4 EBuEOY9JHflop2+5GLnA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHO42-00DS11-29; Tue, 08 Feb 2022 10:49:38 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nHO3s-00DRz2-7D for linux-arm-kernel@lists.infradead.org; Tue, 08 Feb 2022 10:49:29 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1644317368; x=1675853368; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S1gftKaYgRVlWT8LHhLQHW2YcgyuvKJJFSYmqWNRzww=; b=mrOQZeNtlGA/u2fHBxqsnV4OfNLpxZpJbE2evX+Pd9iKvKyulHTyN8Vj tXDkKhY+Du9l8sCjOq6Kcfn3QpzktOM4meIneM6wUa69RWHb+A6zDYI42 8IQorgdEO+LK7YRhfzHxq++coGnzjucFyppuuz1cA5wIlbLZ1e36Aoyg8 mQsRlHjaArdA1B2swUT1lR0PUExN4/Ch4CmR+XNE/sekt7igzQ0Zojj3T HUvTF0Wp8yCngAvC/NGR9ZxG0u8JYO4Umu0CRKMUOT2o8LuXZOPhkxd98 xgVZSw6J0SCIIXzgz7Kzh3cmhfyA9vdCXTI9Bw/rQ71wpqCkdTVuBj/za w==; IronPort-SDR: dfH9SZszMf+DGfuE/bSUHGRzi0aP3ldUTXgnQqYeq+CsG8Nke37i2VZZFacsOTUH35cWWd2t5I 0wMItFuQpHbVvU6K3xDfFFGdu3CMDU1uGBvEutZGPU+rHI+gfW9Q2q5b26lV6icniAyzvMunQJ pM/cm85JxlQjtR4WRXCMVfQEhl6STTHTn+/ALgjDxNw3LwUEt8zjRgdsQiYk7vdm/qI7DeRcjs 6Dpdjbi3jXOrkA3L3wh7v6Z9RGZ5+pRUmxeVNuvdWTh82EihePXoB9cLwRlzb/pRRoW0KlISRN At9W20RtgftmVfIlt5VlcYYd X-IronPort-AV: E=Sophos;i="5.88,352,1635231600"; d="scan'208";a="152826403" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Feb 2022 03:49:27 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 8 Feb 2022 03:49:27 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 8 Feb 2022 03:49:24 -0700 From: Tudor Ambarus To: , Subject: [PATCH v2 1/3] dt-bindings: crypto: Convert Atmel AES to yaml Date: Tue, 8 Feb 2022 12:49:16 +0200 Message-ID: <20220208104918.226156-2-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220208104918.226156-1-tudor.ambarus@microchip.com> References: <20220208104918.226156-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220208_024928_296576_4AF4F334 X-CRM114-Status: GOOD ( 13.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, alexandre.belloni@bootlin.com, Tudor Ambarus , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, kavyasree.kotagiri@microchip.com, claudiu.beznea@microchip.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert Atmel AES documentation to yaml format. With the conversion the clock and clock-names properties are made mandatory. The driver returns -EINVAL if "aes_clk" is not found, reflect that in the bindings and make the clock and clock-names properties mandatory. Update the example to better describe how one should define the dt node. Signed-off-by: Tudor Ambarus --- .../crypto/atmel,at91sam9g46-aes.yaml | 65 +++++++++++++++++++ .../bindings/crypto/atmel-crypto.txt | 20 ------ 2 files changed, 65 insertions(+), 20 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml new file mode 100644 index 000000000000..146ff9c7b60e --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-aes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator + +maintainers: + - Tudor Ambarus + +properties: + compatible: + const: atmel,at91sam9g46-aes + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: aes_clk + + dmas: + items: + - description: TX DMA Channel + - description: RX DMA Channel + + dma-names: + items: + - const: tx + - const: rx + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + aes: crypto@f8038000 { + compatible = "atmel,at91sam9g46-aes"; + reg = <0xe1810000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; + clock-names = "aes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + }; diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt index f2aab3dc2b52..1353ebd0dcaa 100644 --- a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt +++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt @@ -2,26 +2,6 @@ These are the HW cryptographic accelerators found on some Atmel products. -* Advanced Encryption Standard (AES) - -Required properties: -- compatible : Should be "atmel,at91sam9g46-aes". -- reg: Should contain AES registers location and length. -- interrupts: Should contain the IRQ line for the AES. -- dmas: List of two DMA specifiers as described in - atmel-dma.txt and dma.txt files. -- dma-names: Contains one identifier string for each DMA specifier - in the dmas property. - -Example: -aes@f8038000 { - compatible = "atmel,at91sam9g46-aes"; - reg = <0xf8038000 0x100>; - interrupts = <43 4 0>; - dmas = <&dma1 2 18>, - <&dma1 2 19>; - dma-names = "tx", "rx"; - * Triple Data Encryption Standard (Triple DES) Required properties: