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bh=vF8dUDxBLg/KOBc9PRSd0SMrgfYJLbgm+N3PEriXxXg=; b=iptnQOEPq+X+36ozhw2m7ykG1Fy327s1c+b+QbAgAEBBPzJI/bYTXcVW PPmO7XZn/LM2kUuj2OnuHBlJEcinvj3GUimgm91e/gIJgMsbbVN1/WQJg 9pi4kWoDEwfMmeeGCUaSgNeHyFpiLAA6Q+fATNGMOJZf43WNqdRYnGsCE lubjBj+vkNpXAlg4kUAg1HmoG8lKnuVq5XzjI9H80UR1fmeNtsdTQVLdh Nu//EizNDHvrnmQh4LYtpZTj4RpixTR6D7RwmOY6Dpv2Gek+PChVka2jN R46CwMOwwVXCF8bZtdUPY1CadeFGmfDyORVZgwECTNMtjn3STch4M7hVz A==; X-IronPort-AV: E=Sophos;i="5.88,352,1635199200"; d="scan'208";a="21960356" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 08 Feb 2022 13:32:59 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id C2F1328007C; Tue, 8 Feb 2022 13:32:58 +0100 (CET) From: Alexander Stein To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , Matthias Schiffer , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/5] ARM: dts: imx6qdl-mba6: Move pinmux to regulator node Date: Tue, 8 Feb 2022 13:32:48 +0100 Message-Id: <20220208123248.821826-5-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220208123248.821826-1-alexander.stein@ew.tq-group.com> References: <20220208123248.821826-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220208_043308_524277_6957D515 X-CRM114-Status: GOOD ( 13.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org GPIO2_IO00 is used by reg_pcie, move the pinmuxing to this node as well. Signed-off-by: Alexander Stein --- arch/arm/boot/dts/imx6qdl-mba6.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/imx6qdl-mba6.dtsi index 9aacc1a62189..f4dca20669d6 100644 --- a/arch/arm/boot/dts/imx6qdl-mba6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-mba6.dtsi @@ -86,6 +86,8 @@ reg_mba6_3p3v: regulator-mba6-3p3v { reg_pcie: regulator-pcie { compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_regpcie>; regulator-name = "supply-pcie"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -436,8 +438,6 @@ pinctrl_pcie: pciegrp { MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x001b0f0 /* #PCIE.RST */ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */ - /* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/ - MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */ >; }; @@ -462,6 +462,13 @@ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x00003050 >; }; + pinctrl_regpcie: regpciegrp { + fsl,pins = < + /* HYS = 1, DSE = 110, PUE+PKE, SPEED = HIGH (11)*/ + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */ + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099