Message ID | 20220211153843.3721618-1-hugo@hugovil.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: imx8mp-evk: add support for I2C5 | expand |
On Fri, Feb 11, 2022 at 10:38:43AM -0500, Hugo Villeneuve wrote: > From: Hugo Villeneuve <hvilleneuve@dimonoff.com> > > Add support for i2c5, which is used to access the > external I2C bus on connector J22 of the imx8mp-evk. > > Limit the speed to 100kHz since this is an external I2C bus. > > Disabled by default, since it is shared with the CAN1 bus. > > To enable i2c5, you need to disable the CAN1 function, enable the i2c5 > function and also configure the CAN1/I2C5_SEL GPIO to HIGH to > select i2c5 instead of CAN1. This can be done by defining a gpio-hog > inside the pca6416 node, in your board device tree, like in this example: > > &flexcan1 { > status = "disabled"; > }; > > &i2c5 { > status = "okay"; > }; > > &pca6416 { > can1-i2c5-sel-hog { > gpio-hog; > gpios = <2 GPIO_ACTIVE_HIGH>; > output-high; > line-name = "can1-i2c5-sel"; > }; > }; > > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Applied, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index a82c31dbdbf3..4c3ac4214a2c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -319,6 +319,21 @@ pca6416: gpio@20 { }; }; +/* I2C on expansion connector J22. */ +&i2c5 { + clock-frequency = <100000>; /* Lower clock speed for external bus. */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5>; + status = "disabled"; /* can1 pins conflict with i2c5 */ + + /* GPIO 2 of PCA6416 is used to switch between CAN1 and I2C5 functions: + * LOW: CAN1 (default, pull-down) + * HIGH: I2C5 + * You need to set it to high to enable I2C5 (for example, add gpio-hog + * in pca6416 node). + */ +}; + &snvs_pwrkey { status = "okay"; }; @@ -464,6 +479,13 @@ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c3 >; }; + pinctrl_i2c5: i2c5grp { + fsl,pins = < + MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA 0x400001c3 + MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c3 + >; + }; + pinctrl_pmic: pmicgrp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x000001c0