| Message ID | 20220216114054.269656-1-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dt-bindings: dma: Convert mtk-uart-apdma to DT schema | expand |
On 16/02/2022 12:40, AngeloGioacchino Del Regno wrote: > Convert the MediaTek UART APDMA Controller binding to DT schema. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../bindings/dma/mediatek,uart-dma.yaml | 112 ++++++++++++++++++ > .../bindings/dma/mtk-uart-apdma.txt | 56 --------- > 2 files changed, 112 insertions(+), 56 deletions(-) > create mode 100644 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml > delete mode 100644 Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt > > diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml > new file mode 100644 > index 000000000000..4583c8f535b2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml > @@ -0,0 +1,112 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek UART APDMA controller > + > +maintainers: > + - Long Cheng <long.cheng@mediatek.com> > + > +description: | > + The MediaTek UART APDMA controller provides DMA capabilities > + for the UART peripheral bus. > + > +allOf: > + - $ref: "dma-controller.yaml#" > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - mediatek,mt2712-uart-dma > + - mediatek,mt8516-uart-dma > + - const: mediatek,mt6577-uart-dma > + - enum: > + - mediatek,mt6577-uart-dma > + > + reg: > + minItems: 1 > + maxItems: 16 > + > + interrupts: > + description: | > + TX, RX interrupt lines for each UART APDMA channel > + minItems: 1 It would be useful to have an "if:" block constraining the interrupts (and reg array?), if the dma-requests is missing. If you need an example, see length of "max8997,pmic-buck1-dvs-voltage" array in relation to presence of max8997,pmic-buck1-uses-gpio-dvs. https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml#L259 The best would be to restrict number of interrupts to number of requests, but I think dtschema cannot express this. > + maxItems: 32 > + > + clocks: > + description: Must contain one entry for the APDMA main clock > + maxItems: 1 > + > + clock-names: > + const: apdma > + > + "#dma-cells": > + const: 1 > + description: | > + The first cell specifies the UART APDMA channel number > + > + dma-requests: > + description: | > + Number of virtual channels of the UART APDMA controller > + maximum: 16 > + > + mediatek,dma-33bits: > + type: boolean > + description: Enable 33-bits UART APDMA support > + > +required: > + - compatible > + - reg > + - interrupts > + - "#dma-cells" No need for requiring dma-cells. It is coming from dma-common.yaml. > + Best regards, Krzysztof
On 16/02/2022 14:26, Krzysztof Kozlowski wrote: > On 16/02/2022 12:40, AngeloGioacchino Del Regno wrote: >> Convert the MediaTek UART APDMA Controller binding to DT schema. >> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >> --- >> .../bindings/dma/mediatek,uart-dma.yaml | 112 ++++++++++++++++++ >> .../bindings/dma/mtk-uart-apdma.txt | 56 --------- >> 2 files changed, 112 insertions(+), 56 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml >> delete mode 100644 Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt >> >> diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml >> new file mode 100644 >> index 000000000000..4583c8f535b2 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml >> @@ -0,0 +1,112 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: MediaTek UART APDMA controller >> + >> +maintainers: >> + - Long Cheng <long.cheng@mediatek.com> Is this still up-to-date? Emails bounce: smtp; 550 Relaying mail to long.cheng@mediatek.com is not allowed Best regards, Krzysztof
Il 16/02/22 14:26, Krzysztof Kozlowski ha scritto: > On 16/02/2022 12:40, AngeloGioacchino Del Regno wrote: >> Convert the MediaTek UART APDMA Controller binding to DT schema. >> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >> --- >> .../bindings/dma/mediatek,uart-dma.yaml | 112 ++++++++++++++++++ >> .../bindings/dma/mtk-uart-apdma.txt | 56 --------- >> 2 files changed, 112 insertions(+), 56 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml >> delete mode 100644 Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt >> >> diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml >> new file mode 100644 >> index 000000000000..4583c8f535b2 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml >> @@ -0,0 +1,112 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: MediaTek UART APDMA controller >> + >> +maintainers: >> + - Long Cheng <long.cheng@mediatek.com> >> + >> +description: | >> + The MediaTek UART APDMA controller provides DMA capabilities >> + for the UART peripheral bus. >> + >> +allOf: >> + - $ref: "dma-controller.yaml#" >> + >> +properties: >> + compatible: >> + oneOf: >> + - items: >> + - enum: >> + - mediatek,mt2712-uart-dma >> + - mediatek,mt8516-uart-dma >> + - const: mediatek,mt6577-uart-dma >> + - enum: >> + - mediatek,mt6577-uart-dma >> + >> + reg: >> + minItems: 1 >> + maxItems: 16 >> + >> + interrupts: >> + description: | >> + TX, RX interrupt lines for each UART APDMA channel >> + minItems: 1 > > It would be useful to have an "if:" block constraining the interrupts > (and reg array?), if the dma-requests is missing. If you need an > example, see length of "max8997,pmic-buck1-dvs-voltage" array in > relation to presence of max8997,pmic-buck1-uses-gpio-dvs. > https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml#L259 > > The best would be to restrict number of interrupts to number of > requests, but I think dtschema cannot express this. > Thank you for the very much appreciated example! I don't think that dtschema can express that without an if block... so, I'll use that. >> + maxItems: 32 >> + >> + clocks: >> + description: Must contain one entry for the APDMA main clock >> + maxItems: 1 >> + >> + clock-names: >> + const: apdma >> + >> + "#dma-cells": >> + const: 1 >> + description: | >> + The first cell specifies the UART APDMA channel number >> + >> + dma-requests: >> + description: | >> + Number of virtual channels of the UART APDMA controller >> + maximum: 16 >> + >> + mediatek,dma-33bits: >> + type: boolean >> + description: Enable 33-bits UART APDMA support >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + - "#dma-cells" > > No need for requiring dma-cells. It is coming from dma-common.yaml. Right. Forgot about that, will fix! > >> + > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml new file mode 100644 index 000000000000..4583c8f535b2 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek UART APDMA controller + +maintainers: + - Long Cheng <long.cheng@mediatek.com> + +description: | + The MediaTek UART APDMA controller provides DMA capabilities + for the UART peripheral bus. + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2712-uart-dma + - mediatek,mt8516-uart-dma + - const: mediatek,mt6577-uart-dma + - enum: + - mediatek,mt6577-uart-dma + + reg: + minItems: 1 + maxItems: 16 + + interrupts: + description: | + TX, RX interrupt lines for each UART APDMA channel + minItems: 1 + maxItems: 32 + + clocks: + description: Must contain one entry for the APDMA main clock + maxItems: 1 + + clock-names: + const: apdma + + "#dma-cells": + const: 1 + description: | + The first cell specifies the UART APDMA channel number + + dma-requests: + description: | + Number of virtual channels of the UART APDMA controller + maximum: 16 + + mediatek,dma-33bits: + type: boolean + description: Enable 33-bits UART APDMA support + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/mt2712-clk.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + apdma: dma-controller@11000400 { + compatible = "mediatek,mt2712-uart-dma", + "mediatek,mt6577-uart-dma"; + reg = <0 0x11000400 0 0x80>, + <0 0x11000480 0 0x80>, + <0 0x11000500 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>, + <0 0x11000680 0 0x80>, + <0 0x11000700 0 0x80>, + <0 0x11000780 0 0x80>, + <0 0x11000800 0 0x80>, + <0 0x11000880 0 0x80>, + <0 0x11000900 0 0x80>, + <0 0x11000980 0 0x80>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>; + dma-requests = <12>; + clocks = <&pericfg CLK_PERI_AP_DMA>; + clock-names = "apdma"; + mediatek,dma-33bits; + #dma-cells = <1>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt b/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt deleted file mode 100644 index fef9c1eeb264..000000000000 --- a/Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt +++ /dev/null @@ -1,56 +0,0 @@ -* Mediatek UART APDMA Controller - -Required properties: -- compatible should contain: - * "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA - * "mediatek,mt6577-uart-dma" for MT6577 and all of the above - * "mediatek,mt8516-uart-dma", "mediatek,mt6577" for MT8516 SoC - -- reg: The base address of the APDMA register bank. - -- interrupts: A single interrupt specifier. - One interrupt per dma-requests, or 8 if no dma-requests property is present - -- dma-requests: The number of DMA channels - -- clocks : Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: The APDMA clock for register accesses - -- mediatek,dma-33bits: Present if the DMA requires support - -Examples: - - apdma: dma-controller@11000400 { - compatible = "mediatek,mt2712-uart-dma", - "mediatek,mt6577-uart-dma"; - reg = <0 0x11000400 0 0x80>, - <0 0x11000480 0 0x80>, - <0 0x11000500 0 0x80>, - <0 0x11000580 0 0x80>, - <0 0x11000600 0 0x80>, - <0 0x11000680 0 0x80>, - <0 0x11000700 0 0x80>, - <0 0x11000780 0 0x80>, - <0 0x11000800 0 0x80>, - <0 0x11000880 0 0x80>, - <0 0x11000900 0 0x80>, - <0 0x11000980 0 0x80>; - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>; - dma-requests = <12>; - clocks = <&pericfg CLK_PERI_AP_DMA>; - clock-names = "apdma"; - mediatek,dma-33bits; - #dma-cells = <1>; - };
Convert the MediaTek UART APDMA Controller binding to DT schema. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../bindings/dma/mediatek,uart-dma.yaml | 112 ++++++++++++++++++ .../bindings/dma/mtk-uart-apdma.txt | 56 --------- 2 files changed, 112 insertions(+), 56 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml delete mode 100644 Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt